CrawlJobs Logo

Filters

Location
Salary

Design Verification Engineer Jobs

53 Job Offers

Design Verification Engineer II
Save Icon
Location Icon
Location
United States , Raleigh
Salary Icon
Salary
100600.00 - 199000.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Senior Design Verification Engineer
Save Icon
Join Microsoft's Silicon team in Raleigh as a Senior Design Verification Engineer. You will verify custom silicon for Azure and other cloud services using advanced UVM methodologies. This role requires a relevant degree and 5+ years of experience in pre-silicon verification. Contribute to the cor...
Location Icon
Location
United States , Raleigh
Salary Icon
Salary
119800.00 - 234700.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Design Verification Engineer II
Save Icon
Location Icon
Location
India , Bangalore
Salary Icon
Salary
Not provided
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Principal Design Verification Engineer
Save Icon
Join Microsoft's Silicon team as a Principal Design Verification Engineer in Mountain View. You will lead pre-silicon verification for cutting-edge cloud infrastructure, developing complex test environments and debugging at IP and SOC levels. This role requires 8+ years of experience with Verilog...
Location Icon
Location
United States , Mountain View
Salary Icon
Salary
139900.00 - 274800.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
CPU Cores Design Verification Engineer
Save Icon
Join AMD's leading team in Fishkill as a CPU Cores Design Verification Engineer. Utilize your C/C++ and SystemVerilog/UVM skills to verify cutting-edge IP and improve emulation environments. A background in Computing/Graphics is a strong advantage. Contribute to delivering industry-leading techno...
Location Icon
Location
United States , Fishkill
Salary Icon
Salary
118800.00 - 178200.00 USD / Year
amd.com Logo
AMD
Expiration Date
Until further notice
Low Power Design Verification Engineer
Save Icon
Join our team as a Low Power Design Verification Engineer in Boxborough. You will verify SoC low-power features using UPF and UVM methodologies to ensure first-pass silicon success. This role requires hands-on experience with ASIC verification, multiple tape-outs, and scripting in Python/Perl. Co...
Location Icon
Location
United States , Boxborough
Salary Icon
Salary
139360.00 - 209040.00 USD / Year
amd.com Logo
AMD
Expiration Date
Until further notice
Staff Engineer, Systems Design Verification Engineering
Save Icon
Lead the technical direction for System Validation Infra in Bengaluru. This senior role requires deep expertise in NAND Flash storage (eMMC/UFS), firmware validation, and Linux kernel debugging. Drive innovation while mentoring a team, using Python and C to develop cutting-edge monitoring tools.
Location Icon
Location
India , Bengaluru
Salary Icon
Salary
Not provided
sandisk.com Logo
Sandisk
Expiration Date
Until further notice
Design Verification Engineer
Save Icon
Join our team in Cracow as a Design Verification Engineer. Leverage your 7+ years of RTL verification expertise with UVM, SystemVerilog, and Python scripting. You will define and execute verification tests, enhance CI flows, and collaborate on EDA tools. We offer private medical care and a lunch ...
Location Icon
Location
Poland , Cracow
Salary Icon
Salary
Not provided
dcg.pl Logo
DCG Sp. z o. o.
Expiration Date
Until further notice
Design Verification Engineer
Save Icon
Join Meta's Reality Labs as a Design Verification Engineer in Sunnyvale. You will verify cutting-edge AI-first wearable SoCs using SystemVerilog/UVM. This role requires 2+ years of experience in IP/SoC verification and scripting with Python/TCL. We offer a competitive package including bonus and ...
Location Icon
Location
United States , Sunnyvale
Salary Icon
Salary
114000.00 - 172000.00 USD / Year
meta.com Logo
Meta
Expiration Date
Until further notice
Engineer, Systems Design Verification Engineering I
Save Icon
Join a global technology leader in Irvine, CA, as a Systems Design Verification Engineer. You will validate cutting-edge Flash and SSD products, executing test plans and analyzing failures. This role requires a technical degree, 1-3 years' experience, and proficiency in C/C++, Python, and Linux/W...
Location Icon
Location
United States , Irvine
Salary Icon
Salary
35.00 - 45.00 USD / Hour
tpsmithgroup.com Logo
Tucker Parker Smith Group
Expiration Date
Until further notice
ASIC Engineer, Design Verification
Save Icon
Join Meta's Infrastructure team as an ASIC Design Verification Engineer in Sunnyvale. You will verify IP and SoC designs for data centers using SystemVerilog/UVM, formal methods, and emulation. This role requires 6+ years of experience and offers collaboration with industry experts, plus bonus an...
Location Icon
Location
United States , Sunnyvale
Salary Icon
Salary
146000.00 - 209000.00 USD / Year
meta.com Logo
Meta
Expiration Date
Until further notice
Mechanical Design Verification Engineer
Save Icon
Join our Wearables team in Sunnyvale as a Mechanical Design Verification Engineer. You will define and execute validation plans for thermal, vibration, and mechanical stress testing on consumer electronics. This role requires 6+ years of experience, expertise in solid modeling, and driving test a...
Location Icon
Location
United States , Sunnyvale
Salary Icon
Salary
144000.00 - 204000.00 USD / Year
meta.com Logo
Meta
Expiration Date
Until further notice
Design Verification Engineer
Save Icon
Join Meta's Reality Labs as a Design Verification Engineer in Sunnyvale. You will verify cutting-edge AI-first wearable SoCs using SystemVerilog/UVM and C++. This role requires 6+ years of IP/SoC verification experience and expertise in scripting. Enjoy a competitive package including bonus and e...
Location Icon
Location
United States , Sunnyvale
Salary Icon
Salary
146000.00 - 209000.00 USD / Year
meta.com Logo
Meta
Expiration Date
Until further notice

About the Design Verification Engineer role

Design Verification Engineer jobs represent a critical pillar in the semiconductor and hardware development industry, ensuring that complex integrated circuits and systems-on-chip (SoCs) function correctly before they are manufactured. Professionals in this role act as the quality gatekeepers of the digital design world, tasked with the rigorous process of confirming that a design meets its specified requirements and operates without critical bugs. The primary responsibility of a Design Verification Engineer is to create and execute comprehensive verification plans. This involves developing sophisticated testbenches using industry-standard methodologies like Universal Verification Methodology (UVM) and languages such as SystemVerilog, Verilog, and C++.

They write both directed and constrained-random tests to stress-test the design, simulating millions of possible scenarios to uncover hidden flaws. A significant part of the daily work involves debugging test failures, working closely with RTL designers to identify whether a bug lies in the design itself or in the test environment. They use advanced simulation tools to analyze waveforms and trace logic errors, ensuring that every functional corner case is covered. Coverage analysis is another core duty; engineers must track code coverage and functional coverage metrics to guarantee that no part of the design remains untested.

This often requires modifying tests or adding new ones to meet strict coverage goals. Beyond pre-silicon simulation, many Design Verification Engineer jobs involve post-silicon validation, where they help bring up actual silicon in the lab, running tests on real hardware to ensure it matches simulation results. They also work with emulation platforms to run software workloads at higher speeds, bridging the gap between simulation and final production. Collaboration is essential, as these engineers interface daily with architects, design engineers, firmware teams, and design-for-test (DFT) specialists to align verification strategies and resolve issues early in the development cycle.

Typical skills required for these roles include deep proficiency in SystemVerilog and UVM, strong debugging abilities, and experience with scripting languages like Perl, Python, or Makefile for automation. A solid understanding of digital logic design, computer architecture, and protocols is also crucial. Most positions require a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, coupled with several years of hands-on verification experience. As chips grow more complex—integrating AI accelerators, advanced graphics, and high-speed interfaces—the demand for meticulous and innovative Design Verification Engineer jobs continues to rise, making this profession indispensable for delivering reliable, high-performance silicon to market.