Staff Design Engineer Jobs

Analog Devices seeks a Staff Analog/Mixed-Signal IC Design Engineer in Shanghai. Requires MSEE with 7+ years experience, full-cycle design ownership from concept to production.

Lead RFIC design at Analog Devices in Istanbul. Requires MS/PhD in EE, 7+ years experience, strong RF fundamentals, Cadence/ADS and tape-out expertise. Innovate on cutting-edge RF products.

Lead IP verification for advanced DRAM IPs (DDR5/LPDDR5/DDR6) in Hyderabad. Requires SV/UVM, RTL verification expertise, scripting skills, and 6-9 years experience. Mentor teams and drive methodology innovation.

Analog Devices seeks a Staff Analog & Mixed-Signal IC Design Engineer in Wilmington, MA to lead high-performance power-delivery IC design for ATE applications. Requires M.S./Ph.D., 10+ years analog design experience, and strong teamwork skills.

Xcel Energy seeks Distribution Design Engineers at entry to senior levels across eight US states. Requires ABET-accredited engineering degree, preferably Electrical, with EIT/FE preferred. Join the clean energy transition.

Astera Labs seeks a Staff/Principal Physical Design STA Engineer in Haifa to drive STA flows and timing sign-off for advanced AI infrastructure chips. Requires 6+ years of STA expertise, SDC constraints, and OCV/AOCV/POCV margining.

Join Astera Labs in Haifa as a Staff Physical Design Engineer specializing in SoC EMIR. Requires 7+ years of EMIR/Power Integrity experience, expertise in RedHawk or Voltus, and FinFET node knowledge.

Join Astera Labs as a Staff/Principal ASIC Design Engineer in Haifa. Lead RTL design from micro-architecture to backend, driving PPA targets with Verilog/SystemVerilog expertise. Shape AI connectivity solutions.

Join Astera Labs as a Senior/Staff Physical Design Engineer in Tel Aviv. Lead RTL2GDS implementation, STA signoff, and advanced node work (7nm and below) while shaping a founding backend team.

Senior digital design role in Catania for an engineer with 8-12 years of EE/ECE experience. Work on advanced power management ICs, leading RTL design, verification and automation with Verilog and SystemVerilog.

Shield AI seeks a Staff Tool Design Engineer in Seattle with 7+ years in aerospace tooling. Own tooling lifecycle from concept to prove-out, design jigs and fixtures in CATIA/NX/SolidWorks, and drive production for advanced defense aircraft.

Powerlattice seeks a Senior/Staff Design Verification Engineer in Vancouver, US, to lead SoC/IP verification with SystemVerilog, UVM, and formal methods. Requires 10+ years experience. Offers stock options and full benefits.

ICEYE seeks a Staff Mechanical Design Engineer in Espoo, Finland to lead spacecraft hardware design from concept to qualification. Requires MSc in Mechanical/Aerospace Engineering, space structures expertise, and ECSS/NASA standards knowledge. Hybrid role.

GlobalFoundries seeks a Sr. Staff Engineer, Analog Design in Richardson, TX to drive complex analog/mixed-signal IP development. Requires 10+ years of experience, CMOS expertise, and Cadence/Synopsys EDA proficiency.

Shield AI seeks a Staff Engineer in San Diego to design and optimize next-gen autonomous UAV configurations. Requires 7+ years in aircraft design, CAD proficiency, and active Secret clearance.

Shield AI seeks a Senior Staff PCB Design Engineer in Seattle to create complex layouts for advanced aircraft. Requires 10+ years of PCB layout experience and expertise in high-speed, RF, and power electronics.

Micron seeks a Staff Engineer in Boise to lead design enablement and layout for advanced packaging. Requires 5+ years in semiconductor, EDA tool proficiency, and strong Python skills. Drive cross-functional innovation.

Lead ESD and latch-up strategy for next-generation HBM DRAM at Micron in Seoul. Requires ESD physics expertise, JEDEC/ESDA standards knowledge, and hands-on protection circuit experience. Shape AI memory reliability.

ALSO seeks a Staff Actuator Design Engineer in Palo Alto to design electromechanical actuators for light EVs. Requires 8+ years experience, motor and motion mechanism expertise. Great benefits included.