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Design Verification Engineer Jobs

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Principal Quantum Design Verification Engineer
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Join Microsoft Quantum in Redmond as a Principal Quantum Design Verification Engineer to drive scalable, fault-tolerant quantum computing. You will own verification environments for complex SoC and IP designs, leveraging UVM, SystemVerilog, and AMS models. Requires a Doctorate or equivalent exper...
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United States , Redmond
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139900.00 - 274800.00 USD / Year
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Microsoft Corporation
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Senior Quantum Design Verification Engineer
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Senior Quantum Design Verification Engineer sought by Microsoft in Redmond, WA. Drive pre-silicon simulation and post-silicon validation for cutting-edge quantum SoCs. Requires a Doctorate/Master’s/Bachelor’s in Physics or Engineering with industry experience. Own verification environments, test ...
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United States , Redmond
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119800.00 - 234700.00 USD / Year
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Microsoft Corporation
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Senior Design Verification Engineer – Graphics & Multimedia IP
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India , Hyderabad
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Not provided
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AMD
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ASIC Design Verification Engineer
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Senior ASIC Design Verification Engineer sought by Cisco’s Common Hardware Group in Bangalore. Leverage 7+ years of UVM/System Verilog expertise to architect and build top-level DV environments for cutting-edge Cisco Silicon One ASICs. Drive verification from test bench creation to post-silicon b...
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India , Bangalore
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Not provided
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Duo Security
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ASIC Design Verification Engineer
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India , Bangalore
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Cisco
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Senior ASIC Design Verification Engineer
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India , Bengaluru
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Hewlett Packard Enterprise
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ASIC Design Verification Engineer
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United States , Austin
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Ericsson
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Mla Design Verification Engineer
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United States , Cupertino; Austin
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Amazon Pforzheim GmbH
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Design Verification Engineer
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Design Verification Engineer sought to build scalable SystemVerilog/UVM environments for next-gen AI accelerators. This role involves mixed-signal ASIC verification, PCIe, and RISC-V subsystems, with a focus on constrained random testing and formal methods. Fully remote position in GMT+1/+3 time ...
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Cyprus
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Noveo
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Design Verification Engineer
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Join our Core team in Hyderabad as a Design Verification Engineer. You will verify next-gen, high-performance x86 microprocessor cores using advanced SystemVerilog and C++ methodologies. This role requires 8-12 years of ASIC verification experience, including CPU architecture, cache, and power ma...
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India , Hyderabad
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AMD
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ASIC Design Verification Engineer
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Join our ASIC team in Santa Clara as a Design Verification Engineer. You will verify next-generation firewall ASICs using SystemVerilog, UVM, and advanced methodologies. This role involves creating test plans, developing testbenches, and ensuring coverage from simulation to silicon validation. Br...
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United States , Santa Clara
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106400.00 - 172150.00 USD / Year
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Palo Alto Networks
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Design Verification Engineer - Azure DPU Silicon
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Join Microsoft's Azure DPU Silicon team in Bangalore to verify cutting-edge Data Processing Unit (DPU) designs. Utilize your 5+ years of ASIC/SoC verification expertise with SystemVerilog and UVM. Collaborate on complex hardware, ensuring first-silicon success for cloud-accelerating SoCs.
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India , Bangalore
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Microsoft Corporation
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Design Verification Engineer
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Join AMD's team in Markham as a Junior Design Verification Engineer. You will verify PCIe Bus Functional Models using UVM and SystemVerilog. This role offers hands-on experience with high-speed interfaces and advanced verification methodologies. Ideal for new graduates eager to learn in a collabo...
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Canada , Markham
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103200.00 - 154800.00 CAD / Year
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AMD
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Design Verification Engineer
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Join Microsoft's Silicon team in Raleigh as a Design Verification Engineer. You will verify custom silicon using UVM, developing VIP and ensuring coverage closure. This role requires a degree in EE/CE/CS and experience with pre-silicon verification. Contribute to powering the global Azure cloud i...
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United States , Raleigh
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100600.00 - 199000.00 USD / Year
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Microsoft Corporation
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Staff Design Verification Engineer
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Join AMD's PLL team in Singapore as a Staff Design Verification Engineer. You will verify complex IPs like PLLs, DDR, and PCIe, driving flows from specification to silicon. This role requires strong verification skills, mentorship ability, and experience with ASIC tools. Be a key contributor in d...
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Singapore , Singapore
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AMD
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Design verification engineer
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Join Microsoft's Silicon team in Bangalore as a Design Verification Engineer. You will lead functional validation of complex ASIC SoCs using UVM/C methodologies. This role requires 2+ years of pre-silicon validation experience with CPUs, GPUs, or accelerators. Contribute to next-generation cloud ...
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India , Bangalore
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Microsoft Corporation
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Senior Design Verification Engineer
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Join Microsoft's Silicon team in Austin as a Senior Design Verification Engineer. You will lead verification for complex fabric interconnects using UVM and advanced methodologies. This role requires expertise in CHI/AMBA protocols and offers a chance to innovate with AI-driven verification tools....
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United States , Austin
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119800.00 - 234700.00 USD / Year
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Microsoft Corporation
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Fpga design verification engineer
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Lead FPGA verification efforts for advanced wireless systems in Ottawa. Develop comprehensive SystemVerilog/UVM test environments and execute verification plans. Analyze coverage and debug RTL to ensure robust design sign-off. Collaborate with design teams on specifications and architecture.
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Canada , Ottawa
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Myticas Consulting
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Principal ASIC Design Verification Engineer
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Lead pre-silicon verification for next-gen firewall ASICs in Santa Clara. Define methodologies, architect test benches, and ensure coverage using SystemVerilog/UVM. Requires 5+ years' experience taking ASICs from concept to production. Expertise in simulation, emulation, and formal verification i...
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United States , Santa Clara
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173600.00 - 280700.00 USD / Year
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Palo Alto Networks
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Staff Design Verification Engineer
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Join AMD's Infinity Fabric team as a Staff Design Verification Engineer in Boxborough. Develop UVM testbenches for cutting-edge Data Fabric IP used across AMD's product lines. Utilize SystemVerilog and functional verification tools to ensure design quality. A degree in Computer/Electrical Enginee...
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United States , Boxborough
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144800.00 - 217200.00 USD / Year
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AMD
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About the Design Verification Engineer role

Design Verification Engineer jobs represent a critical pillar in the semiconductor and hardware development industry, ensuring that complex integrated circuits and systems-on-chip (SoCs) function correctly before they are manufactured. Professionals in this role act as the quality gatekeepers of the digital design world, tasked with the rigorous process of confirming that a design meets its specified requirements and operates without critical bugs. The primary responsibility of a Design Verification Engineer is to create and execute comprehensive verification plans. This involves developing sophisticated testbenches using industry-standard methodologies like Universal Verification Methodology (UVM) and languages such as SystemVerilog, Verilog, and C++.

They write both directed and constrained-random tests to stress-test the design, simulating millions of possible scenarios to uncover hidden flaws. A significant part of the daily work involves debugging test failures, working closely with RTL designers to identify whether a bug lies in the design itself or in the test environment. They use advanced simulation tools to analyze waveforms and trace logic errors, ensuring that every functional corner case is covered. Coverage analysis is another core duty; engineers must track code coverage and functional coverage metrics to guarantee that no part of the design remains untested.

This often requires modifying tests or adding new ones to meet strict coverage goals. Beyond pre-silicon simulation, many Design Verification Engineer jobs involve post-silicon validation, where they help bring up actual silicon in the lab, running tests on real hardware to ensure it matches simulation results. They also work with emulation platforms to run software workloads at higher speeds, bridging the gap between simulation and final production. Collaboration is essential, as these engineers interface daily with architects, design engineers, firmware teams, and design-for-test (DFT) specialists to align verification strategies and resolve issues early in the development cycle.

Typical skills required for these roles include deep proficiency in SystemVerilog and UVM, strong debugging abilities, and experience with scripting languages like Perl, Python, or Makefile for automation. A solid understanding of digital logic design, computer architecture, and protocols is also crucial. Most positions require a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, coupled with several years of hands-on verification experience. As chips grow more complex—integrating AI accelerators, advanced graphics, and high-speed interfaces—the demand for meticulous and innovative Design Verification Engineer jobs continues to rise, making this profession indispensable for delivering reliable, high-performance silicon to market.