Sr. Staff Engineer United States Jobs

Renesas seeks a Sr Staff Digital Engineer in San Jose to define SoC architecture and develop RTL using Verilog/SystemVerilog. Requires MSEE/PhD with 8+ years experience in ASIC/SoC design, timing closure, and protocols like AXI, USB, and SPI.

Lead Renesas' TinyML Lab in Columbia as Sr. Staff Embedded Applications Engineer. Requires 7+ years in embedded C/C++, physical prototyping, DSP, and on-device ML. No clearance needed.