Engineering jobs in Taiwan

Lead thin film process engineering at Micron in Taiwan. Drive deposition innovation, optimize processes, and guide a skilled team to deliver top semiconductor results. Requires 5+ years experience and strong leadership.

Micron seeks a Senior Mechanical Engineer in Miaoli, Taiwan to lead HVAC and process utility projects from design review to commissioning. Requires strong HVAC expertise, P&ID proficiency, and AI tool fluency.

Join Micron in Taichung as a Process Analysis Engineer. Use SPC, FDC, SQL, and Python to optimize manufacturing processes and drive AI-assisted engineering improvements. Master's degree required.

Join Micron in Taichung as a Sr. Engineer for Automation & APC. Lead IIoT development, AI-driven manufacturing solutions, and SPC/APC/FDC applications. Requires an engineering degree and strong English skills.

Senior ASIC Digital Design Engineer role in Hsinchu, Taiwan, verifying configurable system-level IP and subsystems for next-gen RISC-V platforms. Requires a Master's degree and hands-on Verilog/SystemVerilog, C/C++ or Python skills.

Micron seeks an Assembly Equipment Engineer in Taichung, Taiwan to sustain, optimize, and qualify backend assembly equipment.

Micron seeks a QE FDC Engineer in Taiwan to drive semiconductor process control and quality improvements. Requires engineering degree, process experience, and strong analytical skills. Apply now!

Micron seeks a Facilities HVAC Engineer in Tainan to operate and maintain cleanroom HVAC systems including chillers, AHUs, and cooling towers. Requires 3-5 years HVAC experience or fresh engineering graduates.

Micron seeks a Hybrid Bond Assembly Process Development Engineer in Taiwan to drive hybrid bonding and advanced die stacking for next-gen HBM. Requires semiconductor packaging expertise, DOE/SPC skills, and hands-on process development experience.

Micron seeks an HBM Equipment Engineer in Taichung, Taiwan to optimize assembly processes and equipment. Requires 2 years' tool experience, English communication skills, and knowledge of FDC analysis and AI-enabled tools.

Micron seeks a QE FDC Engineer in Taiwan to drive semiconductor process innovation. Requires engineering degree, process experience, and strong analytical skills. Apply AI tools and data analytics to optimize quality control and reduce costs.

Lead the Etch Process Engineering team at Micron Technology in Taiwan. Requires 5+ years in semiconductor manufacturing, team leadership, and data analytics expertise. Drive AI-enabled process innovation.

Ambiq seeks a Senior Product Test Engineer in Hsinchu to drive ATE test program development and production yield improvement. Requires BSEE, 5+ years experience, and S100 platform PGM expertise.

Ambiq seeks a Senior Product Test Engineer in Hsinchu to drive ATE test program development and S100 platform migration. Requires BSEE, 5+ years experience, and strong yield improvement skills.

Axiado seeks a Senior IC Packaging Engineer in Taipei to lead FCBGA, SiP, and chiplet packaging for AI infrastructure SoCs. Requires 10+ years of experience, UCIe and SerDes expertise, and strong OSAT leadership.

Renesas seeks a Sr. Staff Digital Engineer in Zhubei to drive DFT architecture for complex SoCs. Requires 5+ years in scan, MBIST, boundary scan and low-power DFT, plus RTL and ATPG expertise.

Renesas seeks a Senior Staff Package Design Engineer in Zhubei to develop power SiP/module, wafer-level and flip-chip packaging. Requires 10+ years in package development, strong analytical skills and GaN or power expertise.

Renesas seeks a Senior Staff Package Design Engineer in Kaohsiung to develop power SiP/module, wafer-level and flip-chip packaging. Requires 10+ years experience, GaN knowledge a plus.

Renesas seeks a Senior Staff Package Design Engineer in Taipei to develop power SiP/module, wafer-level and flip-chip packaging. Requires 10+ years of package development experience and strong GaN or power expertise.

Renesas seeks a Senior Staff Package Design Engineer in Taichung to develop power SiP, wafer-level and flip-chip packaging. Requires 10+ years in package development, GaN and power module expertise, plus strong OSAT/CM collaboration skills.