Renesas Electronics - United States, Austin, Hybrid work

Lead verification strategy for next-gen DDR6 semiconductor memory interfaces in Austin. Requires deep SystemVerilog and UVM expertise, technical ownership of complex verification efforts, and collaboration with RTL teams. DDR experience a plus.

Senior Staff Applications Engineer in Austin to design multiphase DC/DC power solutions for AI and cloud infrastructure. Requires 10+ years in power design, high-speed interfaces, and lab validation with strong cross-functional leadership.

Lead digital design projects for advanced power management ICs in Austin. Requires 10+ years EE/ECE experience, Verilog expertise, and strong leadership skills. Mentor junior engineers and drive innovation.

Lead analog and mixed-signal IC development at Renesas in Austin. Requires MSEE, 15+ years of precision analog and power management design experience, plus strong team mentoring and cross-functional collaboration skills.