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Countries
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This list contains only the countries for which job offers have been published in the selected language (e.g., in the French version, only job offers written in French are displayed, and in the English version, only those in English).
(Sr.) Staff Package Design Engineer - MIS substrate/FC expose die (Experienced in Power or Gan is requried)
Renesas seeks a Senior Staff Package Design Engineer in Zhubei to develop power SiP/module, wafer-level and flip-chip packaging. Requires 10+ years in package development, strong analytical skills and GaN or power expertise.
Renesas seeks a Sr Test Engineer in Hukou Township with 3+ years of ATE experience (Advantest V93k preferred). Develop cost-efficient test programs, design ATE hardware, and drive yield improvements with cross-functional teams.
(Sr.) Staff Package Design Engineer - MIS substrate/FC expose die (Experienced in Power or Gan is requried)
Renesas seeks a Senior Staff Package Design Engineer in Kaohsiung to develop power SiP/module, wafer-level and flip-chip packaging. Requires 10+ years experience, GaN knowledge a plus.
(Sr.) Staff Package Design Engineer - MIS substrate/FC expose die (Experienced in Power or Gan is requried)
Renesas seeks a Senior Staff Package Design Engineer in Taipei to develop power SiP/module, wafer-level and flip-chip packaging. Requires 10+ years of package development experience and strong GaN or power expertise.
(Sr.) Staff Package Design Engineer - MIS substrate/FC expose die (Experienced in Power or Gan is requried)
Renesas seeks a Senior Staff Package Design Engineer in Taichung to develop power SiP, wafer-level and flip-chip packaging. Requires 10+ years in package development, GaN and power module expertise, plus strong OSAT/CM collaboration skills.
Staff Package Design Engineer - MIS substrate/FC expose die ( Experienced in Power or Gan is requried )
Renesas seeks a Staff Package Design Engineer in Taipei to develop power SiP, wafer-level and flip-chip packaging. Requires 10+ years in package development, strong analytical skills and GaN knowledge is a plus.
Staff Project/Program Management Specialist- foundry Process Technology
Lead global front-end process technology projects for power semiconductors at Renesas in Taipei. Requires 5+ years in semiconductor industry, PMP/PRINCE2, and strong trilingual communication in English, Japanese, and Chinese.
Staff Project/Program Management Specialist- foundry Process Technology
Lead global foundry process technology projects at Renesas in Taipei. Requires 5+ years semiconductor experience, PMP/Prince2 training, and fluency in English, Japanese, and Mandarin. Drive front-end wafer process innovation.
Staff Application Engineer- Digital Multi-Phase Controller
Renesas seeks a Staff Application Engineer in Taipei to validate multiphase digital controllers. Requires power management experience, Python/C skills, and lab automation expertise. Join a global semiconductor leader.
Dual-role MCU Application Engineer in Taipei combining embedded firmware (C/C++) with digital power expertise. Requires 8+ years in embedded systems, DC-DC control, and PID compensators. Support Renesas customers with board bring-up and power solutions.
Sr. Staff MCU and Digital Power Application Engineer, Taipei
Join Renesas in Taipei as a Sr. Staff MCU and Digital Power Application Engineer. Leverage 8+ years of embedded systems expertise, C firmware skills, and digital power knowledge to support customers with MCU and power solutions.
Staff Application Engineer- Digital Multi-Phase Controller
Renesas seeks a Staff Application Engineer in Taipei to validate multi-phase digital controllers. Requires power management experience, lab automation skills in Python/C, and PMBus knowledge.