Renesas Electronics - India

Renesas seeks a Staff Validation Engineer in Bengaluru with 9+ years of post-silicon validation experience in DC-DC converters and power management ICs. Lead validation of complex power products, from silicon bring-up to characterization.

Renesas seeks a Staff/Principal STA Engineer in Bengaluru with 8-15 years in synthesis and timing closure. Own hierarchical synthesis, PPA optimization, and full-chip STA on complex high-frequency designs using Fusion Compiler, Innovus, and Primetime.

Lead SoC DFT architecture and test strategy at Renesas in Noida. Requires 15+ years of hands-on DFT experience with Scan, ATPG, MBIST, LBIST and JTAG across multiple SoC tape-outs.

Lead DFT architecture for automotive MCU/SoC products at Renesas in Bengaluru. Requires 15+ years in DFT implementation, ATPG, MBIST, JTAG and scan compression. Drive silicon production readiness.

Renesas seeks a Staff/Senior Staff/Principal Analog Design Engineer in Bengaluru with 8-15 years of experience in analog circuit design, PMICs, and DC-DC converters. Lead complex power products from concept to market release.

Lead silicon validation strategy for automotive and Embedded SoCs at Renesas in Bengaluru. Requires 15+ years in semiconductor validation, SoC expertise, and strong Python/C++ automation skills. Drive first-time-right silicon and global validation teams.

Renesas seeks a Sr Staff Verification Engineer in Bengaluru with 11-15 years of experience. Lead UVM/SystemVerilog testbench development, coverage closure, and silicon debug for complex semiconductor projects.

Renesas seeks a Senior ECAD Library Engineer in Indiranagar to build Altium symbols, footprints and 3D models for NPI projects. Requires IPC-7351 knowledge, Python or VBA automation skills and global team collaboration.

Lead AI/ML innovation in EDA at Renesas as Principal Engineer in Hyderabad or Bangalore. Requires 15+ years in AI/ML, GenAI and Agentic AI, plus Tcl/Perl/Python scripting for RTL-to-GDS flows.

Renesas seeks a Senior Manager, Digital Engineering Automation in Bengaluru to lead enterprise-wide hardware engineering transformation. Requires 18+ years in engineering and 5+ years leading teams, with expertise in AI-enabled automation, PCB design, and embedded systems.

Renesas seeks a Staff Digital Verification Engineer in Bengaluru with 7+ years of UVM/SystemVerilog experience to own verification of complex SoC blocks from planning through coverage closure.

Lead digital design for Power Management ICs at Renesas in Bengaluru. Requires expertise in RTL coding, Verilog/System-Verilog, synthesis, STA, and defining digital/analog boundaries. Join a global semiconductor leader.