This list contains only the countries for which job offers have been published in the selected language (e.g., in the French version, only job offers written in French are displayed, and in the English version, only those in English).
Renesas seeks a Sr. Staff Project/Program Design Manager in Plano to lead NPI programs for AI and datacenter power solutions. Requires 12+ years in semiconductors and 6+ years in NPI program management.
Lead SoC DFT architecture and test strategy at Renesas in Hyderabad. Requires 15+ years of hands-on DFT experience with Scan, ATPG, MBIST, and JTAG across multiple SoC tape-outs.
Renesas seeks a Sr. AI Engineer in Bangalore to build agentic AI systems, RAG pipelines, and production ML solutions. Requires 5+ years in ML, strong Python, and MLOps expertise.
Lead Power QFN and Cu Clip assembly process engineering in Bayan Lepas. Requires 5+ years in assembly engineering, thin die and SPS solder attach expertise, plus SPC and wire bonding knowledge. Drive yield, quality and NPI-to-production transfers.
Lead Power QFN and Cu Clip assembly process engineering in Bayan Lepas. Requires 5+ years in assembly engineering, thin die and SPS solder attach expertise, plus SPC and wire bonding knowledge. Drive yield, quality and NPI-to-production transfers.
Renesas seeks a Staff Engineer for STA in Bengaluru to drive full-chip and block-level timing closure. Requires 4-12 years of STA experience, strong SDC and PrimeTime/Tempus skills, plus Tcl, Perl, or Python scripting.
Staff Project/Program Management Specialist- foundry Process Technology
Lead global front-end process technology projects for power semiconductors at Renesas in Taipei. Requires 5+ years in semiconductor industry, PMP/PRINCE2, and strong trilingual communication in English, Japanese, and Chinese.
Staff Project/Program Management Specialist- foundry Process Technology
Lead global foundry process technology projects at Renesas in Taipei. Requires 5+ years semiconductor experience, PMP/Prince2 training, and fluency in English, Japanese, and Mandarin. Drive front-end wafer process innovation.
Renesas seeks a Senior Validation Engineer in Bengaluru to validate PMICs and DCDCs/LDOs on bench. Requires 4+ years post-silicon experience, C/C++, Python for lab automation, and strong debugging skills.
Lead ATE tester fleet reliability in Bayan Lepas. Own PM, calibration and root-cause analysis across Advantest and Teradyne platforms, manage shift technicians, and drive MTBF/MTTR targets in a 24/7 cleanroom.
Lead semiconductor product engineering at Renesas in Bengaluru. Requires 10+ years in product/test engineering, JEDEC expertise, ESD qualification, and strong data analysis skills. Own full product lifecycle from bring-up to sustaining.
Senior Validation Engineer role in Catania for post-silicon validation of mixed-signal and power management ICs. Requires bench validation experience, Python automation skills, and lab equipment proficiency. Join a global team ensuring silicon meets electrical and performance specs.