AMD - On-site work

Senior DFT Engineer needed in Hyderabad, India, to join AMD’s Radeon Technologies Group. You will implement and verify DFT architectures, including scan insertion, ATPG, and memory BIST, using tools like Mentor TestKompress and Synopsys Tetramax. Requires expertise in Verilog RTL, VCS simulation,...

Lead RTL Design Engineer sought for AMD's Bangalore IP Design team. You will lead front-end design and integration of cutting-edge IPs, utilizing Verilog/SystemVerilog, Spyglass, and CDC tools. Requires 8-12 years of experience in high-speed digital design and SoC power management. Join a global ...

AMD is seeking a CAD Design Engineer in Hyderabad to drive next-gen PnR flow development for 3nm/2nm nodes. You will automate place-and-route methodologies, optimize PPA convergence, and collaborate with global teams and EDA vendors. Requires 8-10 years of experience with Innovus/Fusion Compiler,...

Senior Program Manager – SoC/ASIC Development – Bangalore, India. Lead end-to-end execution of complex System-on-Chip programs from architecture to tapeout and post-silicon. Drive cross-functional teams (CPU/GPU/NOC/DDR) and manage milestones, risk, and dependencies using JIRA, Confluence, and AI...

Join AMD's Adaptive and Embedded Computing Group as an RTL Design Engineer in Hyderabad, India. Leverage 7+ years of front-end RTL expertise to own block design and implementation, ensuring first-pass silicon success. Master Arm architecture, AXI/CHI protocols, and scripting (Python, Perl) while ...

Senior DFT Engineer sought for AMD’s Radeon Technologies Group in Bangalore, India. You will implement and verify DFT architectures, including scan insertion, ATPG pattern generation, and gate-level simulation. Key requirements include expertise in IEEE1500, JTAG, memory BIST, Mentor TestKompress...

AMD is seeking a CAD Design Engineer in Hyderabad to drive next-gen PnR methodology for 3nm/2nm nodes. You will own synthesis, place & route flows, and automation using Python/TCL, collaborating with global teams and EDA vendors. Expertise in Fusion Compiler/Innovus, low-power UPF, and STA is ess...

Join a dynamic GPU design team in Shanghai as a Physical Design Engineer. Drive high-speed microprocessor implementation from concept to tape-out using advanced CMOS technologies. Requires expertise in Timing Closure, PnR, and scripting (Tcl/Python), plus a Master’s in EE or related field. Collab...

Join AMD as a Sr. Manufacturing Engineer in Taiwan (Miao-Li, Hsinchu, or Kaohsiung). Drive innovation in high-performance computing by managing OSAT test equipment, active thermal control, and ATE/SLT hardware. Requires 5+ years in test hardware troubleshooting, statistical analysis (JMP/Minitab/...

Join AMD’s AI server team in Taipei, Taiwan as a Test Engineer. Leverage 2-6 years of DC power test experience to verify CPU/GPU core power, POL, and LDO. You will develop automation test tools, support design engineers with FA, and drive test process improvements. This role offers technical inno...

Join AMD in Hsinchu, Taiwan, as a Sr. Test Engineer to shape next-gen computing. You will develop wafer sort programs, drive silicon debug, and optimize test efficiency using Python or C/C++. Leverage 5+ years of semiconductor experience and strong analog/digital fundamentals to improve yield and...

AMD seeks a Physical Design Engineer in Shanghai to drive end-to-end RTL-to-GDS implementation. This senior role demands expertise in advanced nodes (2nm/3nm), 3DIC design, and PPA optimization for high-performance or low-power solutions. You will lead technical challenges, develop AI methods to ...