VLSI Design Engineer Job at BLUESTREAM PEOPLE (Hampshire)

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

Principal Engineer, VLSI Design Engineering (Analog Design)

Actively contribute to provide High speed IO solutions for next generation Memor...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering (VLSI Design)
Hands-on design knowledge on both Digital custom, Analog & mixed signal design environment
8+ years of Experience on IO circuit blocks used in memory products like DDR4, DDR5, LPDDR4, LPDDR5, GDDR5, GDDR6 is desirable
NAND Flash Design knowledge is plus
Familiar with custom design methodology & flow, Calibration, JTAG design requirements, understanding of High-speed IO circuit and Datapath design including LDO, PLL, DLL, Rx, Tx and clocking circuits
Knowledge of High Speed layout guidelines, analog layout techniques, including floor-planning, matching, shielding and parasitic optimization
Understanding Datapath circuits like pipelining, digital design, STA, fan-out and load estimation, FIFO design etc.
Familiarity with package/board/Power integrity /signal integrity constraints is a plus
Strong communication skills & circuit design knowledge is preferred
Tool knowledge: spice tools: finesim, hspice & other flows

Job Responsibility

Actively contribute to provide High speed IO solutions for next generation Memory in advanced CMOS technology nodes
Designing High Speed IO DDR IO circuits to meet product specifications and product requirements
Work closely with team and actively participate in technical discussions and reviews
Pro-actively get design issues/problems solved
Contribute to or propose innovative design solutions and design methodologies.

Fulltime

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g. system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc. using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

Principal Engineer, VLSI Design Engineering

Sandisk understands how people and businesses consume data and we relentlessly i...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelors/ Masters degree in Electrical/ Electronics Engineering with 8+ years of experience in Analog Circuit Design across different technologies
Experience in developing analog IPs like Switch capacitor circuits, LDO, DC-DC convertor, oscillator, ADCs
Experience in integrating Analog IPs in a complex system
Knowledge of PCB and system design will be preferred
Experience in silicon characterization and probing
Experience in a multi-site environment, interacting with teams in other sites
Possess good mentorship skills
Ability to coordinate priorities and initiatives

Job Responsibility

Work in collaboration with global design teams across sites
Drive innovation in Analog IP designs
Design of IPs like Switched capacitor circuits, Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools
Provide technical leadership and mentor junior engineers
Develop processes and robust design methodology
Help build overall competency in Analog domain

Fulltime

Principal Engineer, VLSI Design Engineering

Principal Engineer role in VLSI Design Engineering focusing on SOC Verification....

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

8+ Years of relevant Logic Verification experience
Able to lead and Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups
Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis

Job Responsibility

Able to lead and Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups

Fulltime

Principal Engineer, VLSI Design Engineering

Sandisk understands how people and businesses consume data and we relentlessly i...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelors/ Masters degree in Electrical/ Electronics Engineering with 8+ years of experience in Analog Circuit Design across different technologies
Should have experience in developing analog IPs like Switch capacitor circuits, LDO, DC-DC convertor, oscillator, ADCs
Should have experience in integrating Analog IPs in a complex system
Knowledge of PCB and system design will be preferred
Should experience in silicon characterization and probing
Should have experience in a multi-site environment, interacting with teams in other sites
Should possess good mentorship skills
Ability to coordinate priorities and initiatives

Job Responsibility

Need to work in collaboration with global design teams across sites
Will be responsible for driving innovation in Analog IP designs
Responsible for design of IPs like Switched capacitor circuits, Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools
Should provide technical leadership and mentor junior engineers
Responsible for developing processes and robust design methodology
Help build overall competency in Analog domain

Fulltime

Principal Engineer, VLSI Design Engineering

Job responsibilities: 8+ Years of relevant Logic Verification experience. Able t...

Location

India , Bangalore

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

8+ Years of relevant Logic Verification experience
Able to lead and Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups
Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis

Job Responsibility

Able to lead and Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups

Fulltime

Staff Engineer, VLSI Design Engineering

Develop test plans, tests and verification infrastructure for a complex IP/Sub-S...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

5 to 7 years of relevant experience
B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering
Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
Basic knowledge of with c, c++, SystemC, perl, python, tcl, shell is preferable
Unit/Sub-system/SOC level verification experience
Experience in leading verification closure of complex IP/SOC for at least one project
Exposure to industry standard verification tools for simulation and debug
RTL & Gate Level Simulations
Proficiency in Verilog, System Verilog, Assertions and UVM
Exposure to Verification Fundamentals

Job Responsibility

Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Hands on in end to end Logic Verification Process including Verification Planning, Functional Coverage planning and development, Test case development, regression, debug and Coverage closure
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions including Formal Verification
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups

Fulltime

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VLSI Design Engineer

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