Technologist, Product Development Engineering Job at Sandisk (Bengaluru)

Technologist, Product Development Engineering

Define Manufacturing Test Flows & Test Methodologies for 3D NAND Flash memory pr...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

14+ years of Work & Project experience in Electronics and/or Semiconductors
Hands on experience with Lab Equipment (Testers, Oscilloscopes, Signal Generators, Logic Analyzers)
Knowledge of IC Test Methodologies, System Testing and Communication Protocols such as USB, eMMC, SAS, PCIe/NVMe etc.
Good with understanding software programs written in C and C++ and able to step through the code if required
Able to work comfortably with Windows and Linux (Ubuntu) Operating systems
Ability to troubleshoot and analyze complex problems with minimal data points
Ability to multi-task and meet deadlines
Excellent communication (written and verbal) and interpersonal skills
The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment
Self-motivated and self-directed, however, must have demonstrated ability to work well with people

Job Responsibility

Define Manufacturing Test Flows & Test Methodologies for 3D NAND Flash memory products to meet customer & quality requirements
Participate in the implementation of Low Cost Test solutions to meet target DPPM
Work in close collaboration with cross-functional R&D teams to finalize the manufacturing test requirements for each of the test phases including the pass/fail criteria for a given product
Validate the manufacturing test programs against the specified requirements by running sample units in lab environment and verifying the test results as well as the parameters of the tested units
Drive the new product migration from R&D to High Volume Manufacturing Phase, support technical issues & coordination with cross functional teams
Failure Analysis & RMA support for internal customer & field issues seen on our products during qualification and post deployment into mass production
Monitor product yield, test time and DPPM. Provide technical solutions for yield improvement, TTR and DPPM reduction
and come up with detail plans and drive for implementation of the these with R&D and factory personnel
Help team members in line with the changing dynamics of the product deliverables
Effectively represent Product Engineering function in various technical and functional forums

Fulltime

Product Development Technologist

Pepsi Lipton, a joint venture between Unilever and PepsiCo, combines 125 years o...

Location

United Kingdom , Colworth Science Park

Salary:

Not provided

Unilever

Expiration Date

Until further notice

Requirements

Degree (or equivalent) in Food Science, Chemical Science or Engineering and/or relevant experience in FMCG in fields related to product development in foods or beverages
Eagerness to work in a practical, lab-based setting
Passion for product development, innovation and making great products
Creativity & flair, with an enthusiasm to innovate and translate product briefs into winning launches
Strong communication, organisational and time management skills, with an ability to flex and multitask

Job Responsibility

Work as part of a cross-functional team to develop great products for our ready to drink portfolio, specifically products with functional benefits for our Intrinsic Health platform and Global breakthrough innovation Inno Hub
Development of amazing, market leading products across our ready to drink portfolio
Supporting global brands Lipton Iced tea and Pure Leaf
Bringing passion about tea, with an understanding of the latest trends in the beverage & functional beverage industry
Ownership of innovation and creativity, in partnership with our marketing and insights teams
Collaborating closely with cross-functional partners, including Marketing, Supply chain, Procurement and Quality
Designing and carrying out practical lab work for development programs & projects (including shipment, tastings, shelf-life testing and quality analysis)
Scaling up winning prototypes from lab, to pilot plant, to factory
Ingredient sourcing, driving innovation and quality through our material partnerships
Sample generation for project requirements, consumer testing, creativity workshops and team tastings

What we offer

competitive salary
pension scheme
annual bonus
subsidised gym membership
discounted staff shop
shares
flexible working options
family-friendly and inclusive workplace

Fulltime

Product Development Technologist

In this busy and exciting role, you will support the delivery of the development...

Location

United Kingdom , Boness

Salary:

Not provided

Bakkavor

Expiration Date

Until further notice

Requirements

Highly motivated with a passion for food and innovation
Strong attention to detail and excellent organisational skills
Excellent PC skills and confident using development or recipe systems
A food based degree or relevant experience
Valid driving licence
Resilient, self motivated and able to manage time effectively
Strong communication skills and an effective team player
Curious, creative and willing to learn and grow within the business
Ability to understand basic engineering or technical principles

Job Responsibility

Support the delivery of the development pipeline, working closely with crossfunctional teams to bring new product ideas to life
Use creativity, commercial understanding and technical skill to support recipes, track trends and deliver accurate development information that drives successful innovation
Build strong relationships with key functions to support development activity
Maintain awareness of retailer requirements and expectations within your product area
Demonstrate passion for food and curiosity around flavours, trends and innovation
Identify emerging food and market trends to inspire product development
Understand relevant site capabilities to support feasible development solutions
Use recipe management systems to generate accurate recipe information and costings
Monitor competitor products and communicate relevant insights
Input accurate information into sector development pipeline documentation

What we offer

Competitive salary and jobrelated benefits
Holidays
Pension up to 8% matched
Life insurance up to 4x salary
Company share save scheme
Greencore Qualifications
Exclusive Greencore employee discount platform
Access to a full Wellbeing Centre platform
Enhanced parental leave and menopause policies

Fulltime

Technologist, ASIC Development Engineering (PD Methodology & CAD Flow Architect/Lead)

Sandisk’s ASIC team builds state-of-the-art memory controllers that power world-...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

10+ years of experience in Physical Design, PD Methodology, or CAD for advanced ASICs
Deep, hands-on understanding of complete PD flow, including: Synthesis, Logical Equivalence Checking (LEC), DFT insertion and integration, Place & Route, Static Timing Analysis (STA), Physical Verification, EM/IR analysis
Strong grasp of inter-dependencies across the PD flow and their impact on design convergence and PPA
Proven experience architecting PD methodologies and flows for complex SoCs or IPs on advanced nodes
M.Tech in VLSI Design or a related field (or equivalent industry experience)
Proficiency in scripting and automation using TCL, Perl, and/or Python
Experience working in multi-project, high-complexity environments with tight schedules

Job Responsibility

Lead and mentor the PD Methodology/CAD team to deliver scalable, production-ready flows and innovative solutions across multiple programs
Design and architect end-to-end PD methodologies (RTL to GDS) for advanced technology nodes, ensuring correctness, robustness, and scalability
Drive continuous improvement in PPA (Power, Performance, Area) and turnaround time through flow optimization, automation, and best practices
Work closely with foundry partners to understand node-specific challenges (design rules, variability, EM/IR, signoff requirements) and develop correct-by-construction solutions
Collaborate with IP teams, RTL design, DFT, and signoff teams to address cross-domain optimization challenges and enable smooth design convergence
Develop “shift-left” and “push-up” methodologies to detect and resolve issues early in the design cycle, improving predictability and schedules
Deliver high-quality, signoff-clean flows with strong emphasis on reliability, yield, and manufacturability
Leverage AI/ML techniques to improve quality, debug efficiency, predict design issues, and enhance overall productivity
Foster a culture of technical excellence and innovation, encouraging the team to develop novel solutions for next-generation challenges

Fulltime

Technologist, ASIC Development Engineering

We are looking for a highly skilled and experienced individual for SoC PD lead p...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field
A minimum of 13 to 15 years of experience in leading RTL to GDSII implementation effort across various SoCs
Proven ability in technically leading a small/medium-sized team for executing projects preferred
Hands-on experience on the entire PD Flow from RTL to GDSII
Should have a good understanding of Floor planning, Power Planning, Placement & Optimization, CTS, Routing, Design Convergence, and Sign-off with in-depth expertise in at least one of these domains
Working knowledge about OCV, MM/MC optimization and multi-power designs (Level shifters, Isolation cells, etc)
Exposure to static timing analysis fixes including automated ECO generation
Strong in areas on CTS, Power, Bump planning, Floorplan
Experience with tools (e.g., Synopsys FusionCompiler, PrimeTime, Cadence Innovus, Constraints Manager, Redhawk, Calibre etc.) and methodologies
Library preparation in any environment (Synopsys, Cadence, etc)

Job Responsibility

To be responsible for leading RTL-to-GDSII SoC implementation effort
To collaborate with cross-functional teams, including Design, Verification, Analog, DFT, SIPI etc
To develop and guide the team members in their work, enhancing their technical capabilities and increasing productivity
To ensure process compliance during project execution and enable / participate in technical discussions/reviews
To prepare and submit status reports for minimizing exposure and risks on the project or closure of escalations
Stay abreast of industry trends and emerging technologies in related fields, and incorporate best practices into the team’s workflow
Foster a culture of innovation, collaboration, and continuous improvement

Fulltime

Technologist, ASIC Development Engineering (PD Methodology & CAD Flow Architect/Lead)

Sandisk’s ASIC team builds state-of-the-art memory controllers that power world-...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

10+ years of experience in Physical Design, PD Methodology, or CAD for advanced ASICs
Deep, hands-on understanding of complete PD flow, including: Synthesis, Logical Equivalence Checking (LEC), DFT insertion and integration, Place & Route, Static Timing Analysis (STA), Physical Verification, EM/IR analysis
Strong grasp of inter-dependencies across the PD flow and their impact on design convergence and PPA
Proven experience architecting PD methodologies and flows for complex SoCs or IPs on advanced nodes
M.Tech in VLSI Design or a related field (or equivalent industry experience)
Proficiency in scripting and automation using TCL, Perl, and/or Python
Experience working in multi-project, high-complexity environments with tight schedules

Job Responsibility

Lead and mentor the PD Methodology/CAD team to deliver scalable, production-ready flows and innovative solutions across multiple programs
Design and architect end-to-end PD methodologies (RTL to GDS) for advanced technology nodes, ensuring correctness, robustness, and scalability
Drive continuous improvement in PPA (Power, Performance, Area) and turnaround time through flow optimization, automation, and best practices
Work closely with foundry partners to understand node-specific challenges (design rules, variability, EM/IR, signoff requirements) and develop correct-by-construction solutions
Collaborate with IP teams, RTL design, DFT, and signoff teams to address cross-domain optimization challenges and enable smooth design convergence
Develop “shift-left” and “push-up” methodologies to detect and resolve issues early in the design cycle, improving predictability and schedules
Deliver high-quality, signoff-clean flows with strong emphasis on reliability, yield, and manufacturability
Leverage AI/ML techniques to improve quality, debug efficiency, predict design issues, and enhance overall productivity
Foster a culture of technical excellence and innovation, encouraging the team to develop novel solutions for next-generation challenges

Fulltime

Technologist, ASIC Development Engineering

We are looking for a highly skilled and experienced individual for SoC PD lead p...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field
A minimum of 13 to 15 years of experience in leading RTL to GDSII implementation effort across various SoCs
Proven ability in technically leading a small/medium-sized team for executing projects preferred
Hands-on experience on the entire PD Flow from RTL to GDSII
Should have a good understanding of Floor planning, Power Planning, Placement & Optimization, CTS, Routing, Design Convergence, and Sign-off with in-depth expertise in at least one of these domains
Working knowledge about OCV, MM/MC optimization and multi-power designs (Level shifters, Isolation cells, etc)
Exposure to static timing analysis fixes including automated ECO generation
Strong in areas on CTS, Power, Bump planning, Floorplan
Experience with tools (e.g., Synopsys FusionCompiler, PrimeTime, Cadence Innovus, Constraints Manager, Redhawk, Calibre etc.) and methodologies
Library preparation in any environment (Synopsys, Cadence, etc)

Job Responsibility

To be responsible for leading RTL-to-GDSII SoC implementation effort
To collaborate with cross-functional teams, including Design, Verification, Analog, DFT, SIPI etc.
To develop and guide the team members in their work, enhancing their technical capabilities and increasing productivity
To ensure process compliance during project execution and enable / participate in technical discussions/reviews
To prepare and submit status reports for minimizing exposure and risks on the project or closure of escalations
Stay abreast of industry trends and emerging technologies in related fields, and incorporate best practices into the team’s workflow
Foster a culture of innovation, collaboration, and continuous improvement

Fulltime

Technologist, ASIC Development Engineering (ASIC SOC Validation)

We are looking for a Technologist (ASIC validation engineer) to work with our ne...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BS/MS degree in Computer Engineering, Electrical Engineering, Computer Science or related field
12 – 17 years of experience on validation and debug
Experience coding in C for SSD embedded system, Python for test automation is a plus
SSD firmware/validation experience in areas of: USB, SD, PCIe/NVMe, NAND and related areas
Experience with lab debugging tools (debugger, logic analyzer, scope)
Good Knowledge in any of the storage protocol - eMMC/USB/NVMe protocol
Good Knowledge in any of the Electrical validation of the storage protocol - eMMC/USB/SD/SDIO/PCIE
Good Knowledge and hands on experience in scripting in C, Python language
Good Knowledge and deep hands on experience in Failure Analysis to understand the Test and FW/Memory features
Good knowledge in Test application development and performance measurement tool, etc.

Job Responsibility

Validation of DDR, PCIe/SD memory product with Host platforms from different OEM/Chipset vendors
Failure Analysis of the issues to root cause whether it is the test issue or product issue
Understand the architecture and design. Come up with validation plan and execute to completion
Understanding the test scenarios and converting them into test cases
Develop Validation firmware using C/C++ in multiple environments using latest standards: FPGA, Simulator, for flash products
perform tasks including SOC bring-up
features validation
ASIC and storage drive debugging
Compliance and interoperability procedures

Fulltime

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Technologist, Product Development Engineering

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Technologist, Product Development Engineering

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Technologist, ASIC Development Engineering

Technologist, ASIC Development Engineering (ASIC SOC Validation)

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