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The candidate to have a passion for complex processor architecture, digital design, and verification in general. The candidate should be team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. The candidate should have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
Job Responsibility:
EMIR closure at Tile /Partition/Subsytem/SOC level on a particular node
Ownership of EMIR Flow & Signoff
Drive EMIR closure for design blocks and full-chip integration
Align EMIR analysis phases with PD milestones (INIT, PREFINAL, FINAL)
Ensure compliance with signoff limits provided by SIPI team for given technology node
Ability to analyze EMIR violations and propose implementation choices
Familiarity with DFx and scan architecture for EMIR considerations
Define EMIR signoff strategy, including IR drop and electromigration analysis
Review floorplan, clocking, and bus structures for IR hotspots
Coordinate bump allocation and power rail alignment with integration teams
Work closely with block owners, PD team, and integration team to execute EMIR runs
Conduct EMIR run reviews and debug sessions with stakeholders
Maintain and improve EMIR flow
Engage with SIPI team for current profile analysis and CPA/CPM models
Requirements:
Minimum 8 to 12 years of relevant work experience
Expertise in Synthesis, ICC2/FC (Fusion Compiler) Physical Design flows/methodologies or equivalent tools
Expertise in Signoff tools like Ansys Redhawk/RHSC on EMIR, PT-PX for Power signoff and Primetime for Timing
Should have worked as a go to person or technical lead for at least few full chip projects
Strong technical leadership and ability to mentor/guide/coach design engineers
Strong inter-personal skills and ability to collaborate with teams spread across multiple geos
Should have good scripting experience in Shell, Python, Perl, TCL, UNIX
Must be using AI technologies in day to day problem solving
Bachelors or Masters degree in Electronics and communication engineering/Electronics and Electrical Engineering