Technologist, ASIC Development Engineering (Design Lead - High-speed IO)

Will be part of team responsible for IO and high speed interface solutions for next generation SOCs in advanced CMOS technology nodes. Will architect IO and high speed interface solutions for SanDisk ASIC controllers. Will interact with cross-functional teams to define requirements/specs, conceive the optimal solution by evaluating architectures, drive implementation, closely work with layout designers in guiding and reviewing the layouts, ensure timely and high-quality deliverables, extend SOC integration support and review and provide support for post-TapeOut activities such as Silicon characterization . Provide good technical leadership in problem solving, planning and mentoring junior engineers. Propose innovative design solutions and design methodologies. Help in building a team and developing processes.