Technical Program Manager - Pre-silicon Team Job at AMD (Austin)

Silicon AMS Technical Program Manager

The Reality Labs Custom Silicon Program Management team at Meta is pioneering br...

Location

United States , Sunnyvale

Salary:

168000.00 - 234000.00 USD / Year

Pre-silicon Validation Engineer - Emulation

We are looking for a dynamic, energetic Systems Design Engineer to join our grow...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Significant 5+ years of relevant experience in complex SoC verification & Validation
Prior hands-on experience with FPGA and/or emulation platforms (Veloce, Palladium, ZEBU, HAPs, Protium)
Developing C/C++/Uefi based test content
Validating hardware features for at least 3 or more projects in a pre-silicon environment
Debugging failures using waveform viewers, log files and microcode trace dumps
Knowledge of low power design emulation/verification and power management fundamentals
Knowledge of UEFI, Windows Operating Systems, Linux
Knowledge of x86 and/or ARM SoC Architecture
Knowledge of Memory subsystem, high speed IO peripherals like PCIe, USB, NPU, SoC & IP level Power Management flow, Security protocols
Knowledge of one or more protocols

Job Responsibility

Driving technical innovation to improve AMD's capabilities across validation, including tool and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives
Debugging issues found during the process, bring-up, validation, and production phases of SOC programs
Working with multiple teams, and tracking test execution to make sure all features are validated and optimized on time
Working closely with supporting technical teams
Engaging in other software/hardware modeling frameworks

Fulltime

Senior Program Manager

As a SoC Program Manager, you will lead end-to-end execution across complex Syst...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Must have experience in SoC/ASIC product cycles and understanding of architecture, integration, validation, and silicon bring-up phases
Strong familiarity with SoC / IP execution flows: Architecture to tapeout lifecycle (standard RTL and netlist-based milestones), IP integration and dependency management, Pre-silicon and post-silicon execution flows, System-level bring-up and platform readiness
Detail-oriented, self-driven with a strong sense of pride and ownership
Proficiency in project management tools (JIRA, Confluence, PowerBI, Excel, MS Project, AI tools)
Strong organizational, problem-solving, interpersonal, presentation, written and verbal communication skills
Ability to build relationships and work effectively as a self-starter and as part of a team
Prior experience driving large multi-site or multi-vendor engagements is desirable
People management experience is desirable
Excellent verbal and written communication skills
Horizontal leadership/Matrix management experience

Job Responsibility

Lead end-to-end execution across complex System-on-Chip (SoC/ASIC) development programs from architecture through tapeout and post-silicon phases
Drive program milestones, manage cross-functional dependencies across IP teams (CPU/GPU/NOC/DDR/SoC subsystems), and ensure alignment across RTL, PD, DFT, firmware, validation, and platform teams
Be responsible for planning, tracking, reporting, and risk management across all phases of SoC execution
Ensure predictable delivery and high-quality outcomes
Define, structure, and drive end-to-end SoC program plans
Ensure requirements are clearly defined and integrated into design, validation, and silicon execution plans
Create and maintain detailed schedules
Track progress across IP teams and ensure timely milestone completion
Drive disciplined execution through structured action tracking, meeting cadences, and program reviews
Drive milestone checklist compliance and readiness reviews

What we offer

Benefits offered are described: AMD benefits at a glance

Fulltime

Senior Program Manager

As a SoC Program Manager, you will lead end-to-end execution across complex Syst...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Must have experience in SoC/ASIC product cycles and understanding of architecture, integration, validation, and silicon bring-up phases
Strong familiarity with SoC / IP execution flows
Architecture to tapeout lifecycle (standard RTL and netlist-based milestones)
IP integration and dependency management
Pre-silicon and post-silicon execution flows
System-level bring-up and platform readiness
Detail-oriented, self-driven with a strong sense of pride and ownership
Proficiency in project management tools (JIRA, Confluence, PowerBI, Excel, MS Project, AI tools)
Strong organizational, problem-solving, interpersonal, presentation, written and verbal communication skills
Ability to build relationships and work effectively as a self-starter and as part of a team

Job Responsibility

Lead end-to-end execution across complex SoC/ASIC development programs from architecture through tapeout and post-silicon phases
Drive program milestones, manage cross-functional dependencies across IP teams
Ensure alignment across RTL, PD, DFT, firmware, validation, and platform teams
Plan, track, report, and manage risk across all phases of SoC execution
Define, structure, and drive end-to-end SoC program plans
Ensure requirements are clearly defined and integrated into design, validation, and silicon execution plans
Create and maintain detailed schedules
Track progress across IP teams and ensure timely milestone completion
Drive disciplined execution through structured action tracking, meeting cadences, and program reviews
Drive milestone checklist compliance and readiness reviews

What we offer

Benefits offered are described: AMD benefits at a glance

Post Silicon Validation Manager

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great prod...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Highly skilled engineering professional with over 15 years of experience
Solid experience in handling high performing, dynamic and a strong technical team
Solid Experience and Knowledge in the post silicon validation of x86 IPs like Cores, Memory, RAS, HSIO
Solid experience in handling the growth charter for growing teams and embrace changes with ease and grace
Adept in calling out risks while anticipating issues and coming up with appropriate mitigation plans
Experienced in working with the Enablement Manager and Leads, Program Managers, Product Managers, BIOS/FW Managers and other cross functional stakeholders and create a robust alignment setup while running execution
Preferred experience working with cross-functional teams like DV/Silicon Designers/Pre-silicon/Platform/BIOS/FW/ SW
Experience in High Speed I/Os like PCIe (preferably Gen4 and above), Memory (DDR4/DDR5.LPDDR4/LPDDR5), USB4.0/3.2/3.1, USB PD, USB Type C, Display interfaces and Ethernet and high-speed interconnects
Experience in Power Management, Power Delivery, and Power Measurements
Hands-on high speed and board measurement techniques in using high end equipment like Oscilloscopes, Logic Analyzers, Debugger tools, Raspberry PI, Network analyzers, etc

Job Responsibility

Take responsibility for the Post silicon validation scope and plan for IPs like HSIO, Memory, RAS, Cores, LSIO, Power Management, Multimedia etc
Ensure robust planning at the pre-silicon stage, working with DV or Emulation teams and support the Leads and engineers in framing the relevant test cases
Support the team with the right infrastructure at the right time
Define the scaling of the teams for Capability and Capacity in line with the BU’s growth
Bigger picture planning for roadmaps and process improvements
Create a cohesive culture of openness, diversity, technical growth for the team members
Act with great resolve during testing times of critical issues, milestones, customer escalations and BU related internal changes
Exhibit strong leadership qualities to take the team forward towards growth and achieving the mission of the company
Exhibit great technical depth in the post silicon validation to take the right technical decisions for the team
Ensuring the team delivers error free and timely delivery of test cases and test reports, meeting or beating the program commitment

Fulltime

Vlsi Design Verification Manager - Slingshot Asic Team

Hewlett Packard Enterprise is seeking a VLSI Design Verification Manager to lead...

Location

United States , Ft. Collins

Salary:

142000.00 - 270000.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent
Typically 10+ years of experience in VLSI design verification, with strong hands-on background in pre-silicon DV
Strong understanding of SystemVerilog and UVM-based verification methodologies
Demonstrated technical leadership in design verification
Ability to lead engineers through influence, technical credibility, mentorship, and clear communication
Experience with verification planning, coverage-driven verification, regression management, and sign-off readiness
Proficiency with DV workflows using industry EDA simulation tools
Strong analytical and problem-solving skills
Excellent written and verbal communication skills
Ability to operate effectively in a multi-site, cross-functional engineering environment

Job Responsibility

Provide leadership and direction for a team responsible for all phases of pre-silicon design verification, including verification planning, testbench development, coverage closure, regression management, and sign-off reviews
Define, own, and evolve design verification methodology, ensuring consistent, high-quality verification practices across block, subsystem, and full-chip scopes
Ensure development of robust SystemVerilog/UVM-based environments, including stimulus, scoreboards, checkers, assertions, and functional coverage
Drive regression health, failure triage, root-cause isolation, and closure of design issues in close collaboration with logic design and architecture teams
Manage project deliverables, schedules, and staffing to meet program milestones and quality goals
Recruit, mentor, and develop engineers
set performance expectations and support career growth across junior through senior levels
Identify and drive opportunities for process improvement, reuse, automation, and efficiency in verification workflows
Communicate verification status, risks, and readiness clearly to management and cross-functional partners

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

Platform Soc Debug Lead Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great prod...

Location

United States , Austin

Salary:

200000.00 - 300000.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Strong understanding of Server platform components, x86 or other complex CPU architectures
Deeper domain expertise in areas such as IO interfaces - PCIe, CXL, RAS, Power management to drive comprehensive system level test-plan execution
Understanding of BMC firmware and features, including IPMI, Redfish, sensor monitoring, power control, and remote management is a plus
Prior experience with computer system design and/or validation, testing tools, and environments
Experience with handling and taking captures using Oscilloscopes, protocol analyzers, and JTAG based Debug Tools
Proficiency in C, Python, and shell scripting for low-level development and debug
Excellent organizational skills and the ability to prioritize multiple workstreams and meet tight deadlines
Strong networking and relationship-building skills, with the ability to drive effective decision-making across various functions and levels within the organization
Knowledge of pre-silicon environments (Verification, Emulation, Virtual Bring-Up) is a plus
BS or MS degree in Electrical Engineering or related major, with 12+ years of applicable experience

Job Responsibility

Lead platform and SoC debug for EPYC/AI server platforms, driving issue resolution, validation, and quality to meet program milestones
Lead debugging efforts for enabling AI/Server SoC platforms in domains such as high-speed data-center I/O (PCIe, CXL, etc.), RAS features to resolve issues efficiently that are seen from the program execution
Collaborate with partner organizations to provide root cause analysis for platform issues in a Data center environment
Improve debug capabilities and methodology over time by identifying common challenges or impediments to efficient debug and working with partner organizations like design, Firmware and software teams to drive innovation in silicon architecture, design, tools and methods
Manage and track technical issues, risks, and priorities effectively with the business unit and SW Debug tools teams
Manage customer and executive communications, including program status, risks and opportunities
Maintain strong communication skills, both verbal and written, to convey summary findings and recommendations to senior management

Fulltime

System Design & Debug Manager – AI Customer Engineering

This role serves as the debug execution backbone of AMD's AI Customer Engineerin...

Location

United States , Santa Clara

Salary:

186080.00 - 279120.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Deep understanding of data center system architecture (CPU, GPU, FPGA, memory, connectivity, RAS, hotplug)
Familiarity with hardware bring up, validation, manufacturing, and test flows
Knowledge of reliability and quality metrics (yield, DPM, FIT)
Proven years of experience in the semiconductor industry
Deep hands-on experience with silicon debug (pre-silicon and post-silicon)
Strong background in product development, debug tools, validation, failure analysis, or customer engineering
Proven experience managing complex debug programs across multiple customer segments
Strong functional team and project management skills with ability to drive execution across global, cross-functional teams
Excellent written and verbal communication skills, including executive-level engagement
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field required

Job Responsibility

Debug Program Leadership - Lead debug execution across hyperscale, OEM, HPC, and enterprise customer programs. Own high-impact, cross-customer and systemic issues and maintain visibility into top risks and trends
Customer Program Integration - Partner with Customer Program Managers to align debug execution with customer deliverables, platform readiness, and deployment schedules. Support escalations and executive-level customer engagements
Technical Debug Coordination - Drive cross-functional debug efforts across design, validation, product engineering, and failure analysis. Align pre- and post-silicon debug strategies and connect lab debug to real-world customer environments
Field Failure & Fleet Quality Management - Lead resolution of field failures, fleet anomalies, and data center reliability issues. Aggregate fleet, RMA, and production signals and feed learnings back into design, validation, and manufacturing
Governance & Process Improvement - Own debug tracking, prioritization, risk management, and executive reporting. Apply structured methodologies (8D, CAPA, FMEA) and drive continuous improvement in execution speed and consistency

Fulltime

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Technical Program Manager - Pre-silicon Team

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