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Systems Engineering Lead Feature Enablement and Validation

Canada, Markham Employment contract 125520.00 - 188280.00 CAD / Year · Job Posted May 14, 2026
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Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING  At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  The Role: The AMD Client & Graphics (CG organization) Systems Engineering team needs a dynamic, energetic Senior Engineering Lead to provide technical leadership to our growing Virtualization Feature Enablement & Validation team.  The CGSE team is a key element of AMD’s strategy to deliver the highest quality, industry-leading technologies to market.  As a Senior Technical Lead, you will be leading a team who is responsible for end-to-end technical execution of feature enablement, validation and debugging of integrated systems with multiple IPs, such as SRIOV, RAS, RM, Clustering, and server technologies. The Person: A hands-on technical leader who guides and supports the team, fostering collaboration, accountability, and technical excellence A dependable team player who creates an inclusive, collaborative work environment and leads by example An effective communicator with strong listening skills, able to align the team and clearly articulate technical direction, expectations, and tradeoffs Possesses broad system-level knowledge with strong debugging and problem-solving skills, motivated by complex, cross‑domain technical challenges Combines deep systems thinking and debug expertise with pragmatic project execution, continuous improvement in validation methodologies and tooling, and effective cross‑team collaboration

Job Responsibility

  • Own and lead end-to-end execution of CG‑VDI (Virtual Desktop Infrastructure) feature enablement and validation strategy across multiple programs, spanning pre‑silicon and post‑silicon phases, including prioritization, planning, and delivery commitments
  • Provide hands-on technical leadership for complex system-level debug across pre‑silicon, bring-up, validation, and production, driving effective triage, root-cause analysis, and timely issue closure
  • Mentor and develop engineers through coaching, technical reviews, and knowledge sharing
  • foster a culture of ownership, high quality, and continuous learning within a small team
  • Collaborate closely with design, DV, firmware, driver, diagnostics, emulation, and tools teams to align on requirements, interfaces, schedules, and efficient debug workflows
  • Support customer platform issues in partnership with customer support teams, including issue reproduction, analysis, and development of fixes or workarounds
  • Lead and set the technical direction as the CG‑VDI technical leader across business units, owning strategy, standards, and alignment on feature readiness, debug approaches, and validation quality, while driving cross‑team virtualization innovation through best‑practice leadership, technical mentorship, and standardization—improving efficiency and effectiveness via automation, infrastructure enhancements, dashboards, and methodological advancements

Requirements

  • Recent, prior years of experience in SOC industry, including experience as a technical team lead
  • Programming and scripting skills (e.g., C/C++, Python), with a proven record of architecting and scaling validation automation and tooling
  • Proven technical authority leading complex, cross‑functional initiatives and teams, with end‑to‑end ownership of technical strategy, execution, and delivery risk
  • Deep system expertise driving ASIC-, board-, and platform-level debug, owning structured triage and root‑cause analysis across power, clocking, sequencing, and system optimization
  • Advanced hands-on proficiency with lab instrumentation (e.g., protocol/logic analyzers, oscilloscopes) to resolve critical, system-level issues
  • Strong command of PC architectures and virtualization concepts, with working knowledge of high‑speed interfaces and system integration tradeoffs
  • Exceptional technical communication and influence skills, able to drive alignment and decisions across senior engineering, leadership, and partner organizations
  • Demonstrated ability to mentor senior and junior engineers, raise technical standards, and resolve complex cross‑team challenges
  • Highly self-directed and accountable, setting technical direction and driving high‑impact outcomes while enabling teams to execute at scale
  • Bachelors or Masters Degree in Electrical or Computer Engineering (or equivalent experience)

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