Staff Silicon Design Engineer Job at AMD (Sydney)

Silicon Design Engineer

Be part of AMD IO IP team, joining IP design work on host controller IP for the ...

Location

Taiwan , Hsinchu; Taipei

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Expert in Static Timing Analysis, familiar with DC, PT, GCA, and commands, worked in timing closure tasks with high clock frequency
Expert in Verilog RTL design on large-scale digital IP
Good English communication, presentation, and documentation
Work is performed with limited supervision. Strong sense of task scheduling and delivering on time as predetermined milestones committed to the manager
Can solve complex, novel, and non-recurring problems
Major in EE, CS or related, Master Degree or Bachelor with solid working experiences

Job Responsibility

Takes part in host controller development based on architectural requirements for next-generation IO
Works on STA tasks such as defining clock architecture, creating SDC and exceptions, and analyzing timing reports
Works on RTL code development for IP blocks in Verilog HDL to ensure functionality is correct and reusable for multiple product lines
Deals with complex problems in both STA and RTL
Makes technical decisions
Coaches and mentors junior staff

Staff Engineer - ASIC Development Engineering (DFT)

We are seeking a highly skilled Staff Engineer specializing in ASIC Development ...

Location

India , Bangalore

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

Master's degree in Electrical Engineering, Computer Engineering, or a related field
7+ years of experience in ASIC development with a strong focus on DFT
Advanced knowledge of ASIC design and development processes
Expertise in Design for Testability (DFT) methodologies and techniques
Strong programming skills in languages such as Verilog, VHDL, and C++
Proficiency in using EDA tools for ASIC design, verification, and testing
In-depth understanding of semiconductor manufacturing processes
Experience with advanced DFT techniques, including BIST and ATPG
Knowledge of low-power design techniques
Familiarity with industry standards such as IEEE 1149.1 and IEEE 1500

Job Responsibility

Lead the development and implementation of DFT architectures for complex ASIC designs
Collaborate with cross-functional teams to integrate DFT solutions into the overall ASIC design flow
Develop and optimize test patterns using Automatic Test Pattern Generation (ATPG) tools
Implement Built-In Self-Test (BIST) solutions for various ASIC components
Analyze and improve test coverage, fault coverage, and test time for ASIC designs
Troubleshoot and debug DFT-related issues during the design and post-silicon phases
Stay current with industry trends and emerging DFT technologies
Mentor junior engineers and contribute to the development of best practices and methodologies
Participate in design reviews and provide technical guidance to ensure DFT requirements are met
Collaborate with external partners and vendors to evaluate and integrate new DFT tools and technologies

Fulltime

Asic Engineer Sr Staff

Hewlett Packard Enterprise is seeking a seasoned Design-for-Test (DFT) Engineer ...

Location

United States , San Jose

Salary:

148000.00 - 340500.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

10+ years of hands-on DFT experience in ASIC design, preferably in networking or high-speed digital domains
deep understanding of fault models: stuck-at, transition, path-delay
expertise in scan compression, ATPG, and MBIST architecture
experience with Siemens Tessent tools: SSN, JTAG, IJTAG, MBIST, and memory repair
proficiency with Synopsys tools: DFT Compiler, DFTMAX, Tetramax, Design Compiler
simulation experience with Synopsys VCS and Cadence NC-Verilog
timing analysis using PrimeTime and Cadence Tempus
able to define test constraints and review STA reports to ensure timing closure in test modes
debugging with waveform tools such as Novas and SimVision
familiarity with ATE pattern formats (STIL, WGL) and JTAG SVF

Job Responsibility

define and implement DFT architecture for high-performance networking ASICs at 3nm and beyond
collaborate with RTL and physical design teams to integrate scan, compression, boundary scan, and MBIST features
develop and validate ATPG patterns for stuck-at, transition, and path-delay fault models
analyze and resolve DFT-related issues including ATPG DRC violations, simulation mismatches, and timing violations
apply test constraints and perform STA analysis to ensure timing closure in test modes
support silicon bring-up and ATE pattern validation using industry-standard formats (STIL, WGL, SVF)
conduct silicon failure analysis and contribute to system-level debug and yield improvement
automate DFT flows and analysis using scripting languages such as Perl and Tcl.

What we offer

health & wellbeing
personal & professional development
unconditional inclusion
competitive compensation, benefits, and career growth opportunities.

Fulltime

Staff Power Electronics Engineer

Archer is an aerospace company based in San Jose, California building an all-ele...

Location

United States , San Jose

Salary:

163200.00 - 200000.00 USD / Year

Archer Aviation

Expiration Date

Until further notice

Requirements

BS Degree in Electrical Engineering with 10+ years or MS with 8+ years of experience in related fields
Sound knowledge and hands-on experience in traditional and modern power electronic technologies
Low power and high power DC-DC topologies, gate driver, modulation techniques and control theories
Inverter technology for variable speed motor drive, including topologies and PWM techniques
Familiarity with both wide-band-gap and silicon power semiconductor devices
Passive power devices, e.g. inductors, capacitors, resistors and transformers
Experience in design, build, manufacturing and testing of custom magnetics (high -frequency transformers, inductors)
Power electronics system architecture design and hardware integration
Power converters and motor drive (AC-DC, DC-DC, DC-AC) control technologies
Microcontrollers and multiple serial protocols (UART, CAN, SPI, I2C, etc.)

Job Responsibility

Design and build high voltage, high power density power electronics converter products for eVTOL applications
Develop and analyze electrical architectures and power converter (DC-DC) topologies, and ensure system functions, performance, safety and reliability requirements are achieved
Responsible for all aspects of power electronics designs required in an all-electric aircraft, from components to circuits, modules and system integration
Leads new designs from conception into production while working with a multidisciplinary team
Start to finish ownership of hardware – from specification to design, component selection, modeling, prototype, product build, verification testing, safety and reliability validation and manufacturing
Design electronic power supply and sensing circuits
Schematic, layout and PCB assembly design and review
Design and carry out prototype verification tests for proof of concept
Analyze test data and reports to determine if the design meets functional and performance specifications
Troubleshoot and help root cause any issues that occur in the prototype line

Fulltime

Staff Product Development Engineer

Staff Test Engineer is responsible for the test solution for a next-generation A...

Location

Singapore , Singapore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Bachelor/Master in Electrical/Electronic Engineering
Strong hands on experiences in the Semiconductor industry
Strong DFT and ATE test methodologies
End to end ATE Test Prog development, validation and Debug skills including Pre and Post Silicon
Design and review of ATE Hardware (DIB) Design Guidelines
Strong ATE & test class/method development experience with Advantest 93k preferred
Test development experience of more than 1 full product cycle is preferred
Strong Python/Java/Perl/C++ coding skills
Experience with Mentor or Synopsys or Cadence EDA tools or System Level Testing a plus

Job Responsibility

Developing characterization and test coverage strategies/plans during pre-silicon phase
Establishing pattern requirements and driving Design Verification deliveries during pre-silicon phase
Executing the defined characterization and test plans on new silicon
Design Wafer and Package Level Fuse modules for Test Programs
Silicon Bring up and Post Silicon ownership including validation of Test Programs
Perform new device characterization, circuit sensitivity analysis, interpret findings, guide deep-dive investigations to root-cause, and/or provide mitigation actions
Interface with global teams across the organization on root cause resolution for device failures
Foster and develop new ideas/concepts in device test/debug/DFT/DFM and follow-through to deliverable outcomes
Optimize test contents to meet/exceed business goal
Lead effort to optimize product margin to meet business requirements, from Fab to Back-end-Test

Senior Staff Silicon Design Engineer

The AMD SerDes team in Ireland are hiring for an SMTS level Analog Circuit Desig...

Location

Ireland , Cork

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Good analog circuit design and analysis skills
Experience with industry standard schematic entry and circuit simulation tools and methodologies
Good programming / scripting skills
Familiarity with the impact of layout effects on circuit design
Experience with circuit floorplanning
Previous experience on high speed circuit design would be a benefit
Experience in silicon debug, verification and characterization
Good interpersonal/teamwork skills
Bachelors or Masters degree in Electronic/Electrical Engineering

Job Responsibility

Analog circuit design of different circuits related to SerDes phy development to meet block level design specifications
Verification of circuit designs to ensure functional, performance and reliability targets are achieved using industry standard tools and methodologies
Regular presentation and sharing of design progress to peers
Participating in design reviews of other circuits both for identifying potential issues and also from a learning perspective
Communication with SerDes circuit team members at other sites for the purposes of sharing ideas
Feading back circuit performance information to the architecture team for the purposes of system modelling
Support of the system level verification team in the modelling of analog circuits in Verilog and in the debug of identified issues
Assist with silicon bring up and debug

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g. system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc. using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

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Staff Silicon Design Engineer

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