Staff Engineer, VLSI Design Engineering (Analog Design) Job at Sandisk (Bengaluru)

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g. system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc. using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

Staff Engineer, VLSI Design Engineering

Sandisk understands how people and businesses consume data and we relentlessly i...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

B.E./B.Tech/M.E/M.S/M.Tech in electronics branches
Aggregate of 75% & Above in all qualifying exams
4+ years of relevant Industry Experience
CMOS transistor level design, simulation, layout knowledge of common custom circuits like amplifiers, current mirrors, level shifters, switches, decoders
Knowledge of running and debugging Verilog simulations
Good understanding of Solid-State device physics
Comfortable with IC tools such as Cadence analog design environment, HSPICE/FINESIM, VCS/EXCELIUM, UNIX
Ability to troubleshoot and analyze complex problems
Excellent communication skills to effectively collaborate with Off-site counterparts across global teams

Job Responsibility

Designing, modifying and evaluating CMOS circuit structures for the most advanced high-performance low-power 3-dimensional NAND flash memory
Verify designs in simulation and interact with layout, logic and other functional groups for implementation, full chip integration and silicon validation
Evaluation of these circuits will be done through FINESIM and VERILOG simulations
Collaborate with characterization engineers to fully characterize silicon, and partner with other designers to develop solutions for silicon issues
Responsible for full chip silicon evaluation through probing
Interact with Memory Device team for transistor models, EDR/GDR requirements and tradeoffs

Fulltime

Staff Engineer, VLSI Design Engineering

Develop test plans, tests and verification infrastructure for a complex IP/Sub-S...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

5 to 7 years of relevant experience
B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering
Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
Basic knowledge of with c, c++, SystemC, perl, python, tcl, shell is preferable
Unit/Sub-system/SOC level verification experience
Experience in leading verification closure of complex IP/SOC for at least one project
Exposure to industry standard verification tools for simulation and debug
RTL & Gate Level Simulations
Proficiency in Verilog, System Verilog, Assertions and UVM
Exposure to Verification Fundamentals

Job Responsibility

Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Hands on in end to end Logic Verification Process including Verification Planning, Functional Coverage planning and development, Test case development, regression, debug and Coverage closure
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions including Formal Verification
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups

Fulltime

Staff Engineer, VLSI Design Engineering

Develop test plans, tests and verification infrastructure for a complex IP/Sub-S...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

5 to 7 years of relevant experience
B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering
Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
Basic knowledge of with c, c++, SystemC, perl, python, tcl, shell is preferable
Unit/Sub-system/SOC level verification experience
Experience in leading verification closure of complex IP/SOC for at least one project
Exposure to industry standard verification tools for simulation and debug
RTL & Gate Level Simulations
Proficiency in Verilog, System Verilog, Assertions and UVM
Exposure to Verification Fundamentals

Job Responsibility

Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Hands on in end to end Logic Verification Process including Verification Planning, Functional Coverage planning and development, Test case development, regression, debug and Coverage closure
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions including Formal Verification
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups

Fulltime

Senior Staff Senior Silicon Design Automation Engineer

As a design engineer in our CAD and methodology team, you will be responsible fo...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

TCL, Python, PERL, or other scripting languages
PDK, technology enablement
Simulation environments for Spice, PVT
Virtuoso based custom Layout tools and flows
Calibre extraction flows, Totem & Redhawk for EM/IR
SiliconSmart, PrimeTimePhysical aspect of VLSI designs
Strong written and verbal communication skills
Bachelors or Masters degree in computer engineering/Electrical Engineering

Job Responsibility

Execute in CAD infrastructure team supporting multiple IC design projects
Establish and maintain standardized design flows and methodologies
Implement and support customized CAD flows for Fabric design groups
Enable the team in meeting the design and development targets by working closely with external tool vendors
Develop tools flows methodologies on digital back-end domains, sign-off flows for timing, power, EM/IR, DRC/LVS/DFM, etc.
Improve engineering efficiency while improving design quality in IP release process
Be single point contact for bugs and issues for custom and analog physical design team
Build flow in TCL, Python to ensure quality and faster executions
Understand different methodologies used across industry to adopt best practices
Leverage and deploy AMD AI systems to design teams

Fulltime

Staff Engineer, ASIC Development Engineering

Sandisk’s ASIC team builds state-of-the-art memory controllers that power world-...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

3-5 years of experience in mixed-signal / analog design, custom layout, CAD, or methodology roles
Strong understanding of transistor-level circuit design, including device behavior, biasing, matching, noise, and variability
Hands-on experience with custom layout design and a deep appreciation of layout quality and its impact on circuit performance
Expertise in physical verification and signoff, including: DRC, LVS, PERC
EM/IR and reliability signoff tools
Proven experience architecting custom design and verification methodologies for mixed-signal IPs
Strong understanding of interactions between circuit design, layout parasitics, and signoff requirements
Proficiency in scripting and automation using SVRF, SKILL, TCL, Python, and/or Perl
M.Tech / MS in VLSI Design, Microelectronics, or a related field (or equivalent industry experience)

Job Responsibility

Mixed-signal IP CAD and methodology development, covering schematic, layout, verification, and signoff flows
Architect and maintain end-to-end custom design methodologies, from transistor-level design through signoff-ready layouts
Drive layout quality standards, including matching, symmetry, parasitic control, reliability, and manufacturability
Define and enforce physical verification methodologies, including: DRC
LVS
PERC
Reliability and signoff checks
Own and evolve signoff methodologies for mixed-signal IPs, including EM/IR analysis and reliability verification
Work closely with custom circuit designers and layout teams to identify recurring issues and introduce automation, checks, and best practices
Collaborate with foundry counterparts to understand process-specific constraints, reliability requirements, and rule interpretations

Fulltime

New

Senior Lecturer/Associate Professor in Literacy

As a Senior Lecturer / Associate Professor in Literacy, you will play a key role...

Location

Australia , Albury-Wodonga, Bathurst, Port Macquarie, Wagga Wagga

Salary:

Not provided

Charles Sturt University

Expiration Date

June 08, 2026

Requirements

A doctoral qualification relevant to literacy or education, with a recognised teaching qualification
A strong record of high-quality teaching and student-centred learning
An established or emerging research profile aligned to literacy, curriculum or pedagogy
The ability to build productive partnerships and contribute to academic leadership

Job Responsibility

Lead impactful literacy teaching and research
Teach across online and on-campus environments
Shape future teachers and education practice
Contribute to curriculum innovation
Build strong relationships with students and partners
Provide academic leadership in literacy education
Contribute to the School's research profile
Supervise higher degree research students
Actively engage with professional, community and government stakeholders
At Associate Professor level: significant academic leadership, research impact, and contribution to the broader discipline at national/international level

What we offer

17% superannuation

Fulltime

New

Program Manager - Controls and Avionics Solutions

This position is based in Endicott, New York. New York and on-site work will be ...

Location

United States , Endicott

Salary:

120874.00 - 205486.00 USD / Year

Baesystems

Expiration Date

Until further notice

Requirements

Bachelor’s degree in engineering, engineering or manufacturing management, or other discipline
Demonstrated ability for building strong customer/ stakeholder relationships
Strong communication, negotiation, and presentation skills
Ability to interpret data and make data-driven decisions
Highly adaptable with strong initiative
Demonstrated ability to lead and motivate cross-functional teams
Knowledge of the global aviation market and regulatory requirements and/ or military aviation market

Job Responsibility

Maintaining strong customer relationships and leading a multidisciplinary team to execute complex development programs within schedule and budget
Leadership and management oversight of a project team assuring that project’s financials, schedule, and technical objectives are met and that the highest level of customer satisfaction is achieved while meeting all contractual commitments
Work effectively and collaboratively with Engineering, Operations, and all Program Office functional leadership to assure deliveries continue to exceed customer commitments and achievement of financial commitments to the company
Manages, coordinates, plans, organizes, controls, integrates, and executes projects within the Military Aircraft Systems portfolio
Participates in the support of new business and in the development of proposals

What we offer

Health insurance
Dental insurance
Vision insurance
Health savings accounts
401(k) savings plan
Disability coverage
Life and accident insurance
Employee assistance program
Legal plan
Discounts on home, auto, and pet insurance

Fulltime

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Staff Engineer, VLSI Design Engineering (Analog Design)

Sandisk

Location:
India , Bengaluru

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:
January 04, 2026

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Staff Engineer, VLSI Design Engineering (Analog Design)

Sandisk

Location:India , Bengaluru

Category:IT - Software Development

Contract Type:Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:January 04, 2026

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Job Posted:
January 04, 2026