Staff Engineer, VLSI Design Engineering (Analog Design) Job at Sandisk (Bengaluru)

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

Staff Engineer, VLSI Design Engineering

Sandisk understands how people and businesses consume data and we relentlessly i...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

B.E./B.Tech/M.E/M.S/M.Tech in electronics branches
Aggregate of 75% & Above in all qualifying exams
4+ years of relevant Industry Experience
CMOS transistor level design, simulation, layout knowledge of common custom circuits like amplifiers, current mirrors, level shifters, switches, decoders
Knowledge of running and debugging Verilog simulations
Good understanding of Solid-State device physics
Comfortable with IC tools such as Cadence analog design environment, HSPICE/FINESIM, VCS/EXCELIUM, UNIX
Ability to troubleshoot and analyze complex problems
Excellent communication skills to effectively collaborate with Off-site counterparts across global teams

Job Responsibility

Designing, modifying and evaluating CMOS circuit structures for the most advanced high-performance low-power 3-dimensional NAND flash memory
Verify designs in simulation and interact with layout, logic and other functional groups for implementation, full chip integration and silicon validation
Evaluation of these circuits will be done through FINESIM and VERILOG simulations
Collaborate with characterization engineers to fully characterize silicon, and partner with other designers to develop solutions for silicon issues
Responsible for full chip silicon evaluation through probing
Interact with Memory Device team for transistor models, EDR/GDR requirements and tradeoffs

Fulltime

Staff Engineer, VLSI Design Engineering

Develop test plans, tests and verification infrastructure for a complex IP/Sub-S...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

5 to 7 years of relevant experience
B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering
Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
Basic knowledge of with c, c++, SystemC, perl, python, tcl, shell is preferable
Unit/Sub-system/SOC level verification experience
Experience in leading verification closure of complex IP/SOC for at least one project
Exposure to industry standard verification tools for simulation and debug
RTL & Gate Level Simulations
Proficiency in Verilog, System Verilog, Assertions and UVM
Exposure to Verification Fundamentals

Job Responsibility

Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Hands on in end to end Logic Verification Process including Verification Planning, Functional Coverage planning and development, Test case development, regression, debug and Coverage closure
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions including Formal Verification
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups

Fulltime

Staff Engineer, VLSI Design Engineering

Develop test plans, tests and verification infrastructure for a complex IP/Sub-S...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

5 to 7 years of relevant experience
B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering
Proficiency in Computer Science fundamentals – object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
Basic knowledge of with c, c++, SystemC, perl, python, tcl, shell is preferable
Unit/Sub-system/SOC level verification experience
Experience in leading verification closure of complex IP/SOC for at least one project
Exposure to industry standard verification tools for simulation and debug
RTL & Gate Level Simulations
Proficiency in Verilog, System Verilog, Assertions and UVM
Exposure to Verification Fundamentals

Job Responsibility

Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Hands on in end to end Logic Verification Process including Verification Planning, Functional Coverage planning and development, Test case development, regression, debug and Coverage closure
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions including Formal Verification
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups

Fulltime

Senior Staff Senior Silicon Design Automation Engineer

As a design engineer in our CAD and methodology team, you will be responsible fo...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

TCL, Python, PERL, or other scripting languages
PDK, technology enablement
Simulation environments for Spice, PVT
Virtuoso based custom Layout tools and flows
Calibre extraction flows, Totem & Redhawk for EM/IR
SiliconSmart, PrimeTimePhysical aspect of VLSI designs
Strong written and verbal communication skills
Bachelors or Masters degree in computer engineering/Electrical Engineering

Job Responsibility

Execute in CAD infrastructure team supporting multiple IC design projects
Establish and maintain standardized design flows and methodologies
Implement and support customized CAD flows for Fabric design groups
Enable the team in meeting the design and development targets by working closely with external tool vendors
Develop tools flows methodologies on digital back-end domains, sign-off flows for timing, power, EM/IR, DRC/LVS/DFM, etc.
Improve engineering efficiency while improving design quality in IP release process
Be single point contact for bugs and issues for custom and analog physical design team
Build flow in TCL, Python to ensure quality and faster executions
Understand different methodologies used across industry to adopt best practices
Leverage and deploy AMD AI systems to design teams

Fulltime

Staff Engineer, ASIC Development Engineering

Sandisk’s ASIC team builds state-of-the-art memory controllers that power world-...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

3-5 years of experience in mixed-signal / analog design, custom layout, CAD, or methodology roles
Strong understanding of transistor-level circuit design, including device behavior, biasing, matching, noise, and variability
Hands-on experience with custom layout design and a deep appreciation of layout quality and its impact on circuit performance
Expertise in physical verification and signoff, including: DRC, LVS, PERC
EM/IR and reliability signoff tools
Proven experience architecting custom design and verification methodologies for mixed-signal IPs
Strong understanding of interactions between circuit design, layout parasitics, and signoff requirements
Proficiency in scripting and automation using SVRF, SKILL, TCL, Python, and/or Perl
M.Tech / MS in VLSI Design, Microelectronics, or a related field (or equivalent industry experience)

Job Responsibility

Mixed-signal IP CAD and methodology development, covering schematic, layout, verification, and signoff flows
Architect and maintain end-to-end custom design methodologies, from transistor-level design through signoff-ready layouts
Drive layout quality standards, including matching, symmetry, parasitic control, reliability, and manufacturability
Define and enforce physical verification methodologies, including: DRC
LVS
PERC
Reliability and signoff checks
Own and evolve signoff methodologies for mixed-signal IPs, including EM/IR analysis and reliability verification
Work closely with custom circuit designers and layout teams to identify recurring issues and introduce automation, checks, and best practices
Collaborate with foundry counterparts to understand process-specific constraints, reliability requirements, and rule interpretations

Fulltime

New

Attendant - Bar

At Marriott International, we are dedicated to being an equal opportunity employ...

Location

India , Bengaluru

Salary:

Not provided

Marriott Bonvoy

Expiration Date

Until further notice

Requirements

High school diploma or G.E.D. equivalent
No related work experience
No supervisory experience
None

Job Responsibility

Complete opening and closing duties including setting up necessary supplies and tools, cleaning all equipment and areas, locking doors, etc.
Check with captain or supervisor before leaving at end of shift
Set up, stock, and maintain work areas
Stock ice, glassware, and paper supplies
Remove soiled wares from bar top and tables
Maintain cleanliness and condition of work areas, bar, bar unit, tables, and other tools, following all set-up guidelines
Follow all company and safety and security policies and procedures
report accidents, injuries, and unsafe work conditions to manager
and complete safety training and certifications
Ensure uniform and personal appearance are clean and professional, maintain confidentiality of proprietary information, and protect company assets

Fulltime

New

Cover Supervisor

We are looking for dedicated and assertive Cover Supervisors to join our team su...

Location

United Kingdom , Warrington

Salary:

Not provided

Randstad

Expiration Date

May 28, 2026

Requirements

Previous experience working with children/young people (11-16 years).
Enhanced DBS on the Update Service (or willingness to apply for one).
Strong verbal and written skills to engage students effectively.

Job Responsibility

Supervise students across various subjects.
Ensure pupils complete pre-planned work left by the absent teacher.
Maintain a positive learning environment by enforcing school behaviour codes.
Assist pupils with queries regarding the set tasks and learning materials.
Register students and return completed work to the department head.
Manage any immediate classroom emergencies according to school procedures.

What we offer

Competitive pay rates that truly reflect your expertise.
Choose between day to day supply or long term.
Free access unlimited CPD modules and career development pathways.
Placements across your preferred postcodes to keep your travel time short.
A personal consultant to help you find the perfect school match.
Earn £300 in vouchers for referring a friend to our network.

Fulltime

Staff Engineer, VLSI Design Engineering (Analog Design)

Sandisk

Location:
India , Bengaluru

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:
January 18, 2026

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Staff Engineer, VLSI Design Engineering (Analog Design)

Sandisk

Location:India , Bengaluru

Category:IT - Software Development

Contract Type:Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:January 18, 2026

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Job Posted:
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