Staff Engineer, ASIC Development Engineering Job at Sandisk (Bengaluru)

Staff Engineer, ASIC Development Engineering

Sandisk

Location:
India , Bengaluru

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Not provided

Save Job

Apply Position

Job Description:

Sandisk’s ASIC team builds state-of-the-art memory controllers that power world-class NAND Flash products used globally at massive scale. Design Enablement team enables the Technology, Methodology and Flows to the Mixed Signal IP team to deliver best in class products. As the MSIP CAD/Methodology Engineer, you will play a pivotal role in developing, and delivering robust MSIP Design methodologies on cutting-edge technology nodes, enabling best-in-class quality and productivity. This role is ideal for a seasoned MSIP methodology leader who enjoys solving complex cross-domain problems, working closely with foundries, and driving innovation across flows, tools, and teams.

Job Responsibility:

Mixed-signal IP CAD and methodology development, covering schematic, layout, verification, and signoff flows
Architect and maintain end-to-end custom design methodologies, from transistor-level design through signoff-ready layouts
Drive layout quality standards, including matching, symmetry, parasitic control, reliability, and manufacturability
Define and enforce physical verification methodologies, including: DRC
LVS
PERC
Reliability and signoff checks
Own and evolve signoff methodologies for mixed-signal IPs, including EM/IR analysis and reliability verification
Work closely with custom circuit designers and layout teams to identify recurring issues and introduce automation, checks, and best practices
Collaborate with foundry counterparts to understand process-specific constraints, reliability requirements, and rule interpretations
Develop correct-by-construction and shift-left flows to catch issues early and reduce iteration cycles
Drive tool qualification, flow robustness, and productivity improvements across multiple IP programs
Mentor engineers and foster a culture of quality, rigor, and innovation within the CAD/methodology team

Requirements:

3-5 years of experience in mixed-signal / analog design, custom layout, CAD, or methodology roles
Strong understanding of transistor-level circuit design, including device behavior, biasing, matching, noise, and variability
Hands-on experience with custom layout design and a deep appreciation of layout quality and its impact on circuit performance
Expertise in physical verification and signoff, including: DRC, LVS, PERC
EM/IR and reliability signoff tools
Proven experience architecting custom design and verification methodologies for mixed-signal IPs
Strong understanding of interactions between circuit design, layout parasitics, and signoff requirements
Proficiency in scripting and automation using SVRF, SKILL, TCL, Python, and/or Perl
M.Tech / MS in VLSI Design, Microelectronics, or a related field (or equivalent industry experience)

Nice to have:

Exposure to advanced nodes and complex signoff requirements
Experience with memory controllers or high-performance data-path designs
Prior experience applying AI/ML in EDA or design automation is a strong plus
Strong communication and stakeholder management skills

Additional Information:

Job Posted:
February 23, 2026

Employment Type:

Fulltime

Work Type:

On-site work

Sandisk - All Job Offers

Job Link Share: