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The FPGA design team, part of the (VHS) group is responsible for developing a wide range of FPGA solutions for post-silicon validation of memory devices across Western Digital.
Job Responsibility:
Complex logic blocks & IPs design
Work in a multi-disciplinary environment with a variety of complex interfaces
Requirements:
B.Tech/M.Tech in Electrical Engineering, Computer Engineering, or equivalent
5 to 7 years of hands-on experience in RTL logic design
Strong SystemVerilog expertise
SV/UVM-based simulation knowledge is a plus
Experience in multi-clock, high-frequency, and high-performance digital designs
Familiarity with synthesis, STA, and optimization flows
FPGA development experience (Vivado / Synplify) is an advantage
Simulation and verification experience using NCSim, VCS, or equivalent tools
Knowledge of standard storage interfaces such as eMMC or UFS is a strong advantage
Scripting experience with Python/Perl for automation
ML-driven automation experience is a plus
Exposure to board-level design or lab bring-up is an added advantage
Experience applying AI/ML techniques for RTL linting, verification acceleration, or design-space exploration is a strong plus
Familiarity with ML-based test generation, pattern prediction, or EDA tool automation preferred