Staff Digital Design Engineer Job at AMD (Penicuik)

Staff Digital Design Engineer

This is an outstanding opportunity for an experienced engineer passionate about ...

Location

United Kingdom , Penicuik

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Proven experience in power analysis and optimization of digital logic at advanced process nodes
Strong background in digital design techniques, RTL (preferably SystemVerilog)
Experience with PowerArtist and/or PPRTL tools, scripting and flows
Familiarity with ASIC front-end design tools and flows, in particular vectored power analysis and gate-level simulation
BSc or Masters in Electronics, Electrical or Computer Engineering, or related field

Job Responsibility

Collaborate with architects, hardware engineers and verification engineers to define, refine and implement low power DSP features for cutting-edge and next-generation SerDes transceivers
Model and evaluate equalization, filtering and sequence detection algorithms for power efficiency
Contribute to RTL development, using front-end ASIC tools to ensure the highest quality code
Contribute to power testcase creation with verification engineers
Develop comprehensive documentation detailing power optimization approaches

Staff Digital Design Engineer - DSP

This is an outstanding opportunity for an experienced engineer passionate about ...

Location

United Kingdom , Edinburgh

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Proven experience in DSP algorithm development and implementation for SerDes, wireless communications or high-speed serial interfaces (Ethernet, PCIe, etc.)
Familiarity with equalization techniques such as FFE, CTLE, DFE or MLSE and their implementation
Strong background and experience in digital design techniques including clock domain crossing, RTL (preferably SystemVerilog), and ASIC front-end design tools and flows
Understanding of power analysis and techniques for optimization of digital designs for low power
Familiarity with simulation and modeling of DSP blocks in SerDes

Job Responsibility

Collaborate with architects, hardware, and verification engineers to refine and implement new DSP features for cutting-edge and next-generation SerDes transceivers with a focus on low power
Implement DSP algorithms for equalization, filtering and sequence detection
RTL development and using front-end ASIC tools (lint, synthesis, STA) to ensure the highest quality code
Develop comprehensive documentation detailing DSP algorithm interactions with SerDes hardware and software components

Fulltime

ASIC Digital Design, Sr Staff Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing ...

Location

Portugal , Moreira, Porto

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

6-10 years of hands-on experience in FPGA design and verification, with a focus on IP-level functional verification
Proficiency in Verilog and MATLAB for digital design, verification, and FPGA prototyping with logical synthesis flows
Strong programming and scripting skills for test automation and data analytics (Python, C/C++, TCL)
Strong understanding of digital and mixed-signal circuit evaluation, troubleshooting, and performance optimization techniques
Ability to interpret and apply digital architecture and SerDes standards documentation to develop robust verification solutions
Excellent technical documentation skills to ensure clear communication and knowledge transfer

Job Responsibility

Interpreting SerDes standards and digital, analog, and firmware architecture documents to develop verification environments and regression testcases in MATLAB
Evaluating and troubleshooting digital and mixed-signal circuits to ensure optimal performance and resolve complex design challenges
Collaborating with digital, firmware, and analog teams to solve verification challenges and improve design methodologies
Adapting and debugging internal verification environments to effectively replicate challenging scenarios
Identifying and implementing process improvements to enhance efficiency in design procedures and methodologies
Documenting verification environments, plans, and procedures to ensure clear communication and knowledge sharing across teams

What we offer

Comprehensive medical and healthcare plans that work for you and your family
In addition to company holidays, we have ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Staff/ Sr Staff RTL Design Engineer

Synopsys software engineers are key enablers in the world of Electronic Design A...

Location

India , Bengaluru

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

3-5 years of relevant experience in ASIC digital design and verification
Proficiency in RTL simulation, logic synthesis, and timing verification tools
Deep expertise in UVM, SystemVerilog, and protocol verification (e.g., IEEE1500, IEEE1687, AXI, AMBA)
Hands-on experience with VIPs and transactors in simulation and emulation environments
Strong understanding of DFT architectures, interconnects, and cache coherency protocols
Familiarity with debug tools such as Verdi and workflows for performance analysis
Programming skills in SystemVerilog, UVM, Verilog, C/C++, Python, and scripting languages like Tcl
Experience with EDA tools such as VCS, Verdi, and DC, and methodologies including VC Auto-Testbench and protocol compliance checking

Job Responsibility

Developing and modeling RTL logic in Verilog for embedded memory test and SLM IP blocks
Performing digital design validation and functional verification at both block and SoC levels
Executing logic synthesis, static timing analysis, and generating fault coverage reports to ensure robust designs
Applying DFT (Design-for-Test) expertise for comprehensive memory and logic testing
Identifying and troubleshooting design timing and DFT functional issues to optimize chip performance
Utilizing and scripting in languages such as Tcl to automate design and verification workflows
Defining architecture, logic, test bench designs, and embedded software functions for advanced test and analytics
Developing and maintaining technical collateral including test suites, protocol documentation, and debug guides
Collaborating with R&D and marketing teams to define new features, drive enhancements, and align product roadmaps
Delivering product training, managing customer support cases, and ensuring turnaround time (TAT) metrics are met or exceeded

What we offer

Comprehensive medical and healthcare plans that work for you and your family
In addition to company holidays, we have ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Analog Design, Staff Engineer

In this role, you will work on the design, development, and refinement of Multi-...

Location

Canada , Ottawa

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

Ph.D., M.Sc. with 3+ years, or B.Sc. with 5+ years of practical analog IC design experience
degree in Electrical Engineering or Computer Engineering or other relevant field of study
In depth familiarity with transistor level circuit design - sound CMOS design fundamentals
Detailed design experience with one, and familiarity with several other SERDES sub-circuits: receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, DAC
Familiarity with custom digital design (i.e. high-speed logic paths)
Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc)
Understanding of design for reliability (i.e. EM, IR, aging, etc.) and layout effects (i.e. matching, reliability, proximity effects, etc.) as well as ESD issues (i.e. circuit techniques, layout)
Experience with tools for schematic entry, physical layout, and design verification
Understanding of SPICE simulators and simulation methods
Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture

Job Responsibility

Review SERDES standards to develop novel transceiver architectures and sub-block specifications
Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets
Oversee physical layout to minimize the effect of parasitics, device stress, and process variation
Present and review simulation data from internal project teams
Document design features and test plans
Consult on the overall electrical characterization of the SERDES IP product. Review customer silicon data for design enhancements. Propose solutions for post-silicon design updates

What we offer

Comprehensive medical and healthcare plans
Time Away in addition to company holidays, ETO and FTO Programs
Family Support including maternity and paternity leave, parenting resources, adoption and surrogacy assistance
ESPP - Purchase Synopsys common stock at a 15% discount
Retirement Plans
Competitive salaries

Fulltime

Automotive Functional Safety Staff Engineer - Digital DesignWare IP

Our Hardware Engineers at Synopsys are responsible for designing and developing ...

Location

India , Noida

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

Bachelor’s degree in Electrical Engineering (BSEE) with 5+ years, or Master’s degree (MSEE) with 3+ years of relevant experience
Formal training and demonstrated expertise in ISO 26262 functional safety standards
Hands-on experience with semiconductor development flows and digital design at the IP/SoC level
Proficiency in English, both written and spoken
Proven track record in qualifying systems with embedded hardware/software to various ISO 26262 ASIL levels, including ASIL D

Job Responsibility

Develop and maintain ISO 26262 work products, including Technical Safety Concept, FMEDA, FTA, DFMEA, DFA, Safety Plan, and Safety Case documentation
Collaborate with internal product development teams and external automotive customers to ensure coordinated functional safety compliance and alignment with project goals
Evaluate customer requirements pertaining to quality, functional safety, and automotive reliability, providing expert guidance and actionable feedback
Partner with the Functional Safety and product development teams on project/task planning, progress tracking, and regular reporting
Design and implement automation scripts to streamline and enhance automotive safety analyses processes
Lead and participate in quality and functional safety reviews, generating comprehensive reports and recommendations for continuous improvement
Continuously improve and update functional safety methods, templates, and best practices to align with evolving standards and customer needs

What we offer

Comprehensive medical and healthcare plans
Time Away (ETO and FTO Programs)
Family Support (Maternity and paternity leave, parenting resources, adoption and surrogacy assistance)
ESPP (Purchase Synopsys common stock at a 15% discount)
Retirement Plans
Competitive salaries

Fulltime

Sr. Staff Silicon Design Engineer

The focus of this role is to design high performance Radio Frequency (RF) Analog...

Location

Ireland , Dublin

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

At least 5 Years Experience in design of high performance data converters and / or high speed (GHz) circuits
Experience in designing High Performance Digital-to-Analog Converters (eg: Current Steering DAC)
Experience in designing a range of analog circuits such as amplifiers, oscillators, reference circuits and comparators
Excellent understanding of process technology and the influence on circuit behavior
Excellent understanding of circuit simulators and simulation techniques
Ability to create innovate circuits and identify novel circuit techniques
Excellent written and oral communication skills
Ability to work well as part of a team
Bachelors or Masters degree in Electronic Engineering

Job Responsibility

Develop circuit architectures to meet requirement specifications
Simulation test bench development and simulation verification of the developed circuit architectures (schematic and layout)
Collaborate closely with Layout Engineers to implement your design in layout
EMIR and Reliability validation of design circuits
Partaking in on-going design reviews over the course of the design cycle
Validation of your design on return of Silicon from Fab.

Fulltime

Staff Software Engineer - Digital eCommerce

Work Arrangement: This role is categorized as hybrid. This means the successful...

Location

United States , Austin, Texas; Warren, Michigan

Salary:

Not provided

General Motors

Expiration Date

Until further notice

Requirements

Bachelor's degree in Computer Science or a related field, or equivalent work experience.
7+ years of rigorous software engineering experience, with a heavy concentration on enterprise-grade eCommerce solutions (shop, search, cart, checkout, order management) with full stack experience.
Extensive background in Site Reliability Engineering (SRE) principles, telemetry, and observability tools (Datadog) to ensure zero-downtime deployments and rapid incident resolution.
Extensive experience designing and building event-driven microservices, high-throughput RESTful APIs, and backend systems (e.g., Java, Python, Node.js).
Proven track record of mastering new languages, frameworks, and architectural paradigms quickly to solve complex business problems.
Strong hands-on experience with at least one major cloud platform (AWS, Azure, GCP) and containerization/orchestration.
Experience leveraging modern AI coding assistants and automation tools to enhance personal and team output.

Job Responsibility

Champion Operational Excellence: Help in platform management by establishing gold-standard monitoring, alerting, and incident response protocols, specifically for our Shopify infrastructure.
Shopify & eCommerce Leadership: Lead the deployment, configuration, and scaling of Shopify and custom eCommerce platforms, ensuring they can handle peak seasonal traffic with absolute reliability and low latency.
Architect for Scale: Design and implement highly available microservices and APIs that seamlessly integrate Shopify with GM's internal systems, IBM OMS, and external partners.
Drive AI & Engineering Excellence: Champion the integration of AI-assisted development tools (e.g., GitHub Copilot, AI-driven observability) to accelerate code delivery, automate repetitive tasks, and elevate team productivity.
Technical Mentorship: Provide strategic technical direction to a team of mid-level and senior software engineers, aligning architectural decisions with Digital Commerce business goals.
System Resilience: Partner tightly with DevOps and SRE teams to embed advanced observability frameworks (e.g., Datadog) and robust CI/CD pipelines directly into the engineering culture.
Innovate the Platform: Architect systems that support personalized recommendations, dynamic pricing, and real-time inventory visibility to continuously optimize the B2C eCommerce flow.

What we offer

Company Vehicle : Upon successful completion of a motor vehicle report review, you will be eligible to participate in a company vehicle evaluation program, through which you will be assigned a General Motors vehicle to drive and evaluate. Note: program participants are required to purchase/lease a qualifying GM vehicle every four years unless one of a limited number of exceptions applies.
This Job may be eligible for relocation benefits.

Fulltime

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Staff Digital Design Engineer

Job Description

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