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As a Design Verification Engineer on the Infinity Fabric verification team, you join a dedicated team whose work has enabled AMD to put multiple SoCs to market each year. The ground-breaking Fabric IP verified by this team is flexible and scalable and is integral to every new AMD product being developed across Ryzen, Epyc, Instinct, Radeon and Semi-Custom markets. This is your chance to be a part of this unique team!
Job Responsibility:
Develop and enhance UVM-based testbenches to verify new features for a state-of-the-art industry leading Data Fabric IP for AMD’s CPUs, GPUs and APUs
Work closely with other verification engineers, designers, architects, and performance engineers to understand and verify the functionality of a given design element within the context of the block, chip and overall system
Execute test plans for constrained-random and directed tests, new checks and functional coverage
Write tests, sequences, and testbench components in SystemVerilog and UVM to achieve verification of the design
Responsible for verification quality metrics like pass rates, code coverage and functional coverage
Requirements:
Project level experience with design concepts and RTL implementation for same
Experience with functional verification tools by VCS, Cadence, Mentor Graphics
Good understanding of computer organization/architecture
Bachelors or Master's degree in computer engineering/electrical engineering preferred