Staff Analog Layout Design Engineer Job at AMD (Penang)

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

Staff Engineer, VLSI Design Engineering (Analog Design)

Successful candidates will work with the Non-volatile Memory Design team to arch...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BTech/MTech from Premier institute
4+ years design experience in Analog Circuits like Amplifiers, Bandgap, LDOs, Oscillators, switching circuit etc.
Understanding of layout and its impact on circuits
Well versed with industry tools to do analog design
Exposure to full chip simulations
Excellent documentation skills
Written and verbal communication skills
Good Team player, flexible and adapting to learn outside analog design e.g. system integration, silicon validation

Job Responsibility

Design, simulate, and verify critical circuits like Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc. using industry standard EDA tools
Work with layout engineers and closely interact during the design phase by reviewing layout and providing input as needed and perform post layout simulations (Back-annotation) of Analog blocks
Participate in Full chip verification to ensure analog block functionality at chip level
Build understanding on the analog function/circuit usage in system and its impact on chip power/area/performance
Detailed Documentation of Module specifications, signal list, layout guidelines and Checklist
Propose innovative circuit solutions and design methodologies. Document and present new architectures, new and enhanced circuit designs, and simulation results during design reviews
Verify and characterize silicon using lab equipment’s and testers. Corelate the simulation data with silicon data and document the learning
Mentor junior engineers to learn and deliver the assignment
Ensure timelines and quality of assigned assignments

Fulltime

Analog Design, Staff Engineer

In this role, you will work on the design, development, and refinement of Multi-...

Location

Canada , Ottawa

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

Ph.D., M.Sc. with 3+ years, or B.Sc. with 5+ years of practical analog IC design experience
degree in Electrical Engineering or Computer Engineering or other relevant field of study
In depth familiarity with transistor level circuit design - sound CMOS design fundamentals
Detailed design experience with one, and familiarity with several other SERDES sub-circuits: receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, DAC
Familiarity with custom digital design (i.e. high-speed logic paths)
Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc)
Understanding of design for reliability (i.e. EM, IR, aging, etc.) and layout effects (i.e. matching, reliability, proximity effects, etc.) as well as ESD issues (i.e. circuit techniques, layout)
Experience with tools for schematic entry, physical layout, and design verification
Understanding of SPICE simulators and simulation methods
Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture

Job Responsibility

Review SERDES standards to develop novel transceiver architectures and sub-block specifications
Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets
Oversee physical layout to minimize the effect of parasitics, device stress, and process variation
Present and review simulation data from internal project teams
Document design features and test plans
Consult on the overall electrical characterization of the SERDES IP product. Review customer silicon data for design enhancements. Propose solutions for post-silicon design updates

What we offer

Comprehensive medical and healthcare plans
Time Away in addition to company holidays, ETO and FTO Programs
Family Support including maternity and paternity leave, parenting resources, adoption and surrogacy assistance
ESPP - Purchase Synopsys common stock at a 15% discount
Retirement Plans
Competitive salaries

Fulltime

Staff Analog Design Engineer

Our Hardware Engineers at Synopsys are responsible for designing and developing ...

Location

India , Hyderabad

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field)
Proven expertise with FinFET technologies and CMOS tape-outs
Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures
Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC)
Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance
Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating)
Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators
Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results
Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk)
Excellent communication and documentation skills

Job Responsibility

Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications
Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed
Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality
Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance
Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews
Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements
Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates

What we offer

Comprehensive medical and healthcare plans that work for you and your family
Time Away: In addition to company holidays, we have ETO and FTO Programs
Family Support: Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Retirement Plans: Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Senior Quantum Analog Layout Engineer

Microsoft's Quantum team is building the first scalable, fault-tolerant quantum ...

Location

United States , Redmond

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role, including the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
Citizenship & Citizenship Verification: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations (ITAR) or Export Administration Regulations (EAR), the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status for assessment of eligibility to access the export-controlled information
Ability to leverage AI tools to drive innovation and efficiency
Ability to work in an AI-first environment using modern AI tools to accelerate discovery through hardware development.

Job Responsibility

Deliver Schematic-to-Graphic Database System (GDS) layouts for cutting-edge, high-performance, high-speed, low-power IP designs, including interconnectivity solutions and foundational Analog circuit blocks
Execute these layouts across multiple process nodes, including deep Fin Field-Effect Transistor (FinFET), following industry best practices
Develop plans for Analog Mask Layout execution and follow processes and methodologies to deliver IP blocks
Coordinate tasks with junior layout team members as needed
Using Cadence Virtuoso (or other equivalent) design tools and flows
perform layout implementation of analog-intensive IPs and help establish flows, methodologies, and processes for execution alongside peers
Support the on-boarding and off-boarding of contingent layout staff and vendor partners as needed
help direct their day-to-day execution to ensure quality and schedule are met
Work with other members of the team to deliver IPs, including project planning, schedule tracking, and report generation
Follow, augment, or put in place processes and methodologies for high-quality execution alongside peers

What we offer

Certain roles may be eligible for benefits and other compensation
Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

Fulltime

Non-Volatile Memory (NVM) Design Engineer, Staff

Synopsys software engineers are key enablers in the world of Electronic Design A...

Location

Taiwan , Hsinchu

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

5–12+ years of industry experience in circuit design, with a strong emphasis on analog circuit design and analysis
memory design experience is a significant plus
Deep understanding of layout considerations for advanced nodes, including parasitic effects, matching techniques, and signal integrity
Expertise in electrical problem-solving, including root cause analysis of circuit failures and development of effective solutions
Hands-on experience with TestChip tapeout flows, silicon debugging (FIB, micro-probing, post-layout RC extraction), and statistical design methodologies (e.g., Monte-Carlo analysis)
Strong transistor-level analog design skills, including sense-amplifier, charge pump, high voltage regulator, and bandgap reference circuit design
Proficiency with circuit simulation tools (HSIM, HSPICE, etc.) and custom schematic/layout editors (e.g., Custom Compiler)
Experience with low power design, power management circuitry, and FinFET design is a plus
A collaborative team player who thrives in multicultural, cross-functional teams
Independent, self-motivated, and able to manage multiple priorities in a fast-paced environment

Job Responsibility

Leading the NVM TestChip and IP design flow across multiple technologies and foundries, ensuring robust and scalable solutions for diverse applications
Architecting, designing, and verifying CMOS-based non-volatile memory IP modules, from concept to production tapeout
Collaborating with product engineers to perform silicon verification, in-depth testing, and debugging to validate IP performance on silicon
Conducting post-layout extraction, simulation, and comprehensive testing in conjunction with silicon validation teams
Working closely with on-site and off-site design, layout, and CAD teams to optimize design methodologies and ensure project success
Partnering with layout designers on floor planning of memory arrays and analog blocks for performance, area, and manufacturability optimization
Serving as the technical expert to support Sales and Application Engineers during complex pre- and post-sales customer engagements, ensuring customer satisfaction and successful product adoption

What we offer

Comprehensive medical and healthcare plans that work for you and your family
In addition to company holidays, we have ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Sr. Staff Silicon Design Engineer

The focus of this role is to design high performance Radio Frequency (RF) Analog...

Location

Ireland , Dublin

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

At least 5 Years Experience in design of high performance data converters and / or high speed (GHz) circuits
Experience in designing High Performance Digital-to-Analog Converters (eg: Current Steering DAC)
Experience in designing a range of analog circuits such as amplifiers, oscillators, reference circuits and comparators
Excellent understanding of process technology and the influence on circuit behavior
Excellent understanding of circuit simulators and simulation techniques
Ability to create innovate circuits and identify novel circuit techniques
Excellent written and oral communication skills
Ability to work well as part of a team
Bachelors or Masters degree in Electronic Engineering

Job Responsibility

Develop circuit architectures to meet requirement specifications
Simulation test bench development and simulation verification of the developed circuit architectures (schematic and layout)
Collaborate closely with Layout Engineers to implement your design in layout
EMIR and Reliability validation of design circuits
Partaking in on-going design reviews over the course of the design cycle
Validation of your design on return of Silicon from Fab.

Fulltime

Senior Staff Silicon Design Engineer

The AMD SerDes team in Ireland are hiring for an SMTS level Analog Circuit Desig...

Location

Ireland , Cork

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Good analog circuit design and analysis skills
Experience with industry standard schematic entry and circuit simulation tools and methodologies
Good programming / scripting skills
Familiarity with the impact of layout effects on circuit design
Experience with circuit floorplanning
Previous experience on high speed circuit design would be a benefit
Experience in silicon debug, verification and characterization
Good interpersonal/teamwork skills
Bachelors or Masters degree in Electronic/Electrical Engineering

Job Responsibility

Analog circuit design of different circuits related to SerDes phy development to meet block level design specifications
Verification of circuit designs to ensure functional, performance and reliability targets are achieved using industry standard tools and methodologies
Regular presentation and sharing of design progress to peers
Participating in design reviews of other circuits both for identifying potential issues and also from a learning perspective
Communication with SerDes circuit team members at other sites for the purposes of sharing ideas
Feading back circuit performance information to the architecture team for the purposes of system modelling
Support of the system level verification team in the modelling of analog circuits in Verilog and in the debug of identified issues
Assist with silicon bring up and debug

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Staff Analog Layout Design Engineer

Job Description

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