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As a member of the AMD IO IP verification team, the candidate participates in IP verification work on host controller IP for the next generation of leading-edge high-speed IO. Establishes and maintains AMD's high-speed IO technological leadership position.
Job Responsibility:
Participates in IP verification work on host controller IP for the next generation of leading-edge high-speed IO
Establishes and maintains AMD's high-speed IO technological leadership position
Work with team members and apply current functional verification techniques to perform and improve pre-silicon verification quality and product Time to Market for ASIC/SOC projects
Technical leadership on multiple products or product lines, coaching and mentoring less experienced staff, and influencing others as a strong technical leader
Requirements:
Deep understanding of ASIC/SOC design flow
Excellent knowledge of design verification methodology, such as UVM and FPV
Solid experience with simulation model creation and the testbench build
Strong RTL coding with Verilog
Strong C/C++ software development experiences
Be good at scripting languages, such as Perl, C shell, and Makefile
Engineering working experiences with Master or Bachelor Degree, major in EE, CS or related
Good verbal and written communication skills in both Chinese and English
Nice to have:
Experience in digital ASIC/SOC design verification
Specializes in MIPI M-PHY, UniPro, and UFS specifications
Experience/knowledge in X86/ARM/8051 architecture, AMBA (AXI/AHB/APB) bus, NAND Flash host controller, PCI-E/PCI bus, low-power design, clock generation and control
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