Sr. Manager ASIC Job at Amazon Pforzheim GmbH (Austin)

Sr. Manufacturing Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great prod...

Location

Taiwan , Miao-Li, Hsinchu, KaoHsiung

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

BS or MS in Electrical Engineering, Mechanical Engineering, Physics or related experience
Knowledge of high-performance Computing ASIC test process, in particular to active thermal control of ATE and system-level test (SLT)
> 5 years of experience in test hardware troubleshooting and maintenance
In-depth experience of active thermal control hardware development or troubleshooting capabilities
In-depth experience in BI/ATE/SLT equipment – tester, handler, test sockets
Experience in using statistical software such as JMP, Minitab or R language

Job Responsibility

Liaise with global AMD teams and the Suppliers to manage consigned test equipment in OSAT and ensure sufficient equipment to support production and engineering activities
Analyze and debug failing hardware
work with vendor to repair broken hardware
Perform equipment GR&R/MSA and resolve discrepancy
Improve equipment stability, availability and maintenance efficiency by analyzing performance matrices, MTBF, utilization and drive maintenance procedure optimization
Keep equipment operational by coordinating maintenance and repair services, following manufacturer's instructions and established procedures
Perform audits to ensure vendor and OSAT comply with AMD requirements
Perform data analysis to drive cost saving in repair and maintenance activities
Compile manufacturing KPIs and construct regular performance review reports
Drive continuous improvement in hardware management process

Fulltime

Sr. DFT Design Engineer

Custom SoCs (System on Chip) are at the heart of AWS Machine Learning servers. A...

Location

United States , Austin

Salary:

159200.00 - 215300.00 USD / Year

Amazon Pforzheim GmbH

Expiration Date

Until further notice

Requirements

Bachelor's degree in computer science, electrical engineering, or related field
5+ years of practical semiconductor ASIC design work including owning end to end design of major SOC blocks experience
Knowledge about industry standard tools and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
Experience with automation script development

Job Responsibility

Define and develop state-of-the-art Design for Test (DFT) architectures for advanced technology nodes
Work closely with block designers and physical design (PD) team to implement highly efficient DFT solutions
Act as the primary point of contact for cross-functional stakeholders (PD, Architecture, and Product Engineering) to align schedules and goals
Mentor and develop junior engineers through code reviews, methodology training, and technical guidance
Manage project timelines and deliverables, ensuring high-quality DFT implementation from RTL through Silicon bring-up

What we offer

health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
401(k) matching
paid time off
parental leave
sign-on payments
restricted stock units (RSUs)

Fulltime

Sr. Component Engineer - Semiconductor Devices

The Cisco Component Quality and Technology team provides outstanding customer va...

Location

Taiwan , Taipei

Salary:

Not provided

Cisco

Expiration Date

Until further notice

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or related fields
4+ years of experience in the semiconductor/networking/server/computer/embedded industry
6+ years of experience in the semiconductor/networking/server/computer/embedded industry
Experience with semiconductor components including ASICs, XPUs, FPGAs, PHYs, SerDes retimers
Strong understanding of semiconductor design, fabrication, characterization, qualification, testing, quality, reliability, failure analysis
Experience collaborating with stakeholders including hardware and software engineering, operations and manufacturing
Excellent problem-solving, communication, and collaboration skills
Ability to work independently and manage multiple priorities in a fast-paced environment
Demonstrated ability to influence cross-functional teams and drive technical initiatives
Experience with high-speed design and hardware designs with x86 or ARM CPUs

Job Responsibility

Conduct semiconductor component selection, testing, and qualification to meet product specifications
Lead investigations and end-to-end failure analysis for component and system issues, working with vendors to define, implement, and verify corrective and preventive actions (8D, RCCA, etc.)
Collaborate with cross-functional teams on component selection, risk assessment, design reviews, and proactively drive risk mitigation
Analyze and influence vendor technology roadmaps in support of Cisco product development requirements

Fulltime

Sr. Computer/Systems Engineer

Arcfield is seeking a highly skilled and experienced Computer Engineer III to jo...

Location

United States , Crane

Salary:

102516.20 - 178255.78 USD / Year

Arcfield

Expiration Date

Until further notice

Requirements

BS 8-10 years, MS 6-8 years or PhD 3-5 years experience in Computer Engineering, Computer Science, Systems Engineering, Network Engineering or equivalent.
Demonstrated leadership designing and fielding complex computer hardware/software systems for DoD platforms, .
Strong background in full-lifecycle digital engineering, including model-based design, rapid prototyping, hardware-in-the-loop testing, and configuration management.
Hands-on proficiency with modern programming languages (C/C++, Python, Java) and HDL/tool flows for FPGA or ASIC development, plus experience integrating COTS single-board computers and networking hardware.
Prior success coordinating manufacturing, installation, and sustainment activities with multi-company teams, ensuring interface compliance and producibility.
Deep knowledge of computer architecture, embedded processing, interface protocols, and operating systems relevant to Navy/DoD mission computing.
Proven ability to translate system requirements into robust hardware/ software implementations, conduct trade studies, and manage risk across performance, schedule, and cost constraints.
Experience supervising manufacturing or installation of computer systems and conducting formal verification/validation with government stakeholders.
Familiarity with secure development practices, cybersecurity compliance (RMF/DoD guidelines), and documentation required for Navy accreditation packages.
Excellent communication skills for leading design reviews, writing technical documentation, and briefing senior government leadership.

Job Responsibility

Lead efforts in architecting, developing, integrating, and testing cutting-edge systems in embedded processing, networked computing, and edge analytics.
Ensure designs meet the highest standards for performance, reliability, cybersecurity, and manufacturability, from initial concept through full production deployment.
Collaborate with systems engineering, manufacturing, logistics, and government IPT leads to advance prototypes, supervise build-and-install activities, and drive continuous improvements across platforms and laboratories.

What we offer

Health Insurance
Life Insurance
Paid Time Off
Holiday Pay
Short Term and Long-Term Disability
Retirement and Savings
Learning and Development opportunities
wellness programs

Fulltime

Kernel Driver Software Engineer

Etched is building the world’s first AI inference system purpose-built for trans...

Location

United States , San Jose

Salary:

150000.00 - 275000.00 USD / Year

Etched

Expiration Date

Until further notice

Requirements

Proficiency in C/C++
Strong understanding of kernel-mode driver development and debugging
Deep understanding of operating system internals (Linux preferred)
Experience with hardware/software interfacing and device drivers
Experience with memory management and synchronization in kernel environments
Strong understanding of PCIe and other hardware interfaces
Experience with device virtualization technologies, including SR-IOV and VFIO
Strong understanding of kernel memory mapping, page table configuration, and IOMMU
Familiarity with hardware-software co-design principles
Proven ability to analyze complex technical problems and provide effective solutions

Job Responsibility

Kernel-Mode Driver Development: Design, develop, and maintain kernel-mode drivers ensuring high reliability, informative debug, and optimal performance
Performance Optimization: Analyze and optimize driver performance for demanding AI workloads, focusing on minimizing latency and maximizing throughput
Hardware Integration and Co-Design: Collaborate closely with hardware engineers throughout the ASIC design process
Virtualization Support: Implement driver support for device virtualization technologies, including SR-IOV, VFIO, and para-virtualization
Memory Management: Implement efficient memory management strategies considering kernel memory mapping, page tables configuration, NUMA awareness for device data caching, and IOMMU configuration
Security: Build kernel drivers fundamentally designed to support and maintain security across host processes, physical memory spaces, and device attestation
Debugging and Troubleshooting: Diagnose and resolve complex driver-related issues, using common kernel debugging tools and techniques (ftrace, dmesg, etc.) to identify and fix bugs
Synchronization and Concurrency: Design and implement synchronization mechanisms to handle concurrent access to multiple accelerators
System Validation and Testing: Develop and execute comprehensive test plans to validate driver functionality, stability, and performance in manufacturing and in general production environments
Collaboration and Troubleshooting: Collaborate with software and hardware teams to diagnose and resolve complex system-level issues

What we offer

Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office

Fulltime

Director of Engineering

We are seeking a highly experienced and strategic Director of Engineering to tak...

Location

India , Chennai

Salary:

Not provided

Arrcus

Expiration Date

Until further notice

Requirements

BS/MS/PhD in Computer Engineering/Computer Science or equivalent degree
Excellent communication, presentation, and interpersonal skills
5+ years of experience leading and managing distributed engineering teams involved in creating complex software products
10+ years of relevant experience in managing very senior technical talent in some of the following areas: Networking protocols such as OSPF, BGP, ISIS, MPLS, BFD, MLAG, EVPN, VxLAN, SR-MPLS, SRv6, L3VPN
Test Harness like Robot framework, Jinja2
Familiarity network merchant silicon chipsets and whitebox platforms
Software development of Network Data Path (Linux, virtual and ASIC)
Virtualization technologies like SR-IOV, Intel DPDK, FD.io, NSX, OVS
High Availability, ISSU, Linux networking
Debian Build/Packaging, Linux Kernel, Kernel Networking Stack

Job Responsibility

Work with customer and product teams to understand and prioritise new requirements
Develop a holistic understanding of individual employee skill sets and drive resource allocation for customer requirements
Help drive the recruiting process both in terms of attracting new talent as well as defining and streamlining the recruitment process
Continuous Process Improvement: Solicit feedback, drive discussion and implement process and workflow improvements
Provide technical guidance and mitigation for engineering projects
Build 1:1 rapport with engineers, help identify and fulfil personal aspirations by aligning with larger team goals
Strong ability to plan, execute and deliver multiple projects across worldwide sites
Experience with rapidly growing engineering organizations in all aspects of people, resources, tools, and more

What we offer

Generous compensation packages including equity
Medical Insurance
Parental Leave

Fulltime

Staff/ Sr Staff RTL Design Engineer

Synopsys software engineers are key enablers in the world of Electronic Design A...

Location

India , Bengaluru

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

3-5 years of relevant experience in ASIC digital design and verification
Proficiency in RTL simulation, logic synthesis, and timing verification tools
Deep expertise in UVM, SystemVerilog, and protocol verification (e.g., IEEE1500, IEEE1687, AXI, AMBA)
Hands-on experience with VIPs and transactors in simulation and emulation environments
Strong understanding of DFT architectures, interconnects, and cache coherency protocols
Familiarity with debug tools such as Verdi and workflows for performance analysis
Programming skills in SystemVerilog, UVM, Verilog, C/C++, Python, and scripting languages like Tcl
Experience with EDA tools such as VCS, Verdi, and DC, and methodologies including VC Auto-Testbench and protocol compliance checking

Job Responsibility

Developing and modeling RTL logic in Verilog for embedded memory test and SLM IP blocks
Performing digital design validation and functional verification at both block and SoC levels
Executing logic synthesis, static timing analysis, and generating fault coverage reports to ensure robust designs
Applying DFT (Design-for-Test) expertise for comprehensive memory and logic testing
Identifying and troubleshooting design timing and DFT functional issues to optimize chip performance
Utilizing and scripting in languages such as Tcl to automate design and verification workflows
Defining architecture, logic, test bench designs, and embedded software functions for advanced test and analytics
Developing and maintaining technical collateral including test suites, protocol documentation, and debug guides
Collaborating with R&D and marketing teams to define new features, drive enhancements, and align product roadmaps
Delivering product training, managing customer support cases, and ensuring turnaround time (TAT) metrics are met or exceeded

What we offer

Comprehensive medical and healthcare plans that work for you and your family
In addition to company holidays, we have ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Project Engineering Management, Sr Staff Engineer

As we extend our project management team for High-Performance Computing (HPC) de...

Location

Portugal , Moreira, Porto

Salary:

Not provided

Synopsis Engineering

Expiration Date

Until further notice

Requirements

Excellent communication skills, both oral and written, ability to summarize key points in succinct and objective way
A background in ASIC Design/Verification/Implementation - preferably digital
Excellent organizational and time-management skills, with the ability to manage multiple projects simultaneously
Proficiency in project management tools and software, MS Project preferred, PMP certification an advantage
Knowledge/experience of developing or using 3rd party IP - preferably digital
Proven experience in project management, with a track record of successfully leading semiconductor engineering projects, ideally in ASIC Design/verification
Bachelor's or master’s degree in engineering or a related field
Strong knowledge of engineering principles and practices
At least 6 years of experience

Job Responsibility

Collaborating with cross-functional teams to define project requirements, scope, and objectives
Developing detailed project plans, including timelines, resource allocation, and risk management strategies
Monitoring project progress and performance, identifying potential issues, and implementing corrective actions as needed
Communicating project status, updates, and milestones to stakeholders, ensuring transparency and alignment
Representing R&D on customer relationships, tracking execution to plan, aligning with senior leadership of team on mitigation and escalation management
Mentoring and guiding team members, fostering a collaborative and innovative work environment

What we offer

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings

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Sr. Manager ASIC

Job Description

Job Responsibility

Requirements

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Sr. Manager ASIC

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