CrawlJobs Logo
General Motors Logo General Motors · IT - Software Development

Sr Engineer- Emulation

India, Bengaluru · Job Posted February 18, 2026
Apply Position
Job Link Share

Job Description

The Controls/Emulation engineer will be primarily responsible for execution of all Controls/Emulation related projects in various capacities at GM across the Globe with respect to Safety, Delivery, Quality, Cost and Performance. In this position Engineer will be responsible to perform Virtual Commissioning of the system for (Body,Paint,GA,Conveyors,GPS,Press shop Layout Emulation using Emulation standard software(Emulate3D/Process Simulate) . Candidate will also be involved in working on Cell designs and online execution on various new or existing product programs across our portfolio. The incumbent will need to possess a broad technical knowledge, combined with creative and independent thinking and conceptual ability. This position will be based out of GM Technical Center India in Bangalore and will also have few travel opportunities across different regions for project execution.

Job Responsibility

  • Supervise and control projects including project scope, issues, risks, and schedule. Handle issues to closure. Communicate project status and ensure all internal customers are aware of progress through project meetings, status reports and reviews.
  • Have knowledge of Emulation/Virtual Commisioning process & related activities using Process Simulate/Emulate3D software.
  • Lead & develop components in Emulate 3D/Process Simulate library on G12, G16, G22 architecture (Electrical & mechanical)
  • Develop electrical & mechanical models using Demo Emulate 3D/Process Simulate
  • Collaborate with all stake holders (TCI, TCK, GMNA, GMSA) to complete the components development & complete the project & debug the program
  • Co-ordinate and lead all Emulation projects (Global & regional for Body Controls, Conveyor Controls, Press Controls, GPS etc.)
  • Train the other engineers on these software (Process Simulate/ Emulate 3D) as per business needs
  • Flexible to shift over and travel as per business needs (Emulation related or non-emulation related)
  • Emulation/Virtula Commisioning is the major focus area for this engineer during the assigned period. However, if the workload will not amount to full time work, engineer will require to perform the role of project execution of his/her own area in addition to this role.

Requirements

  • Masters/Degree in Electrical Engineering/Electronics Engineering/Instrumentation Engineering
  • In depth knowledge of control systems and/or control systems in automotive assembly plants
  • Thorough knowledge of Rockwell PLC software, Siemens HMI software as well as interfaces to other controls systems
  • Have in-depth knowledge of Process Simulate/Emulate 3D software ,Studio 5000, TIA Portal, Roboguide
  • Good communication and interpersonal skills.
  • Learning & functional expertise.
  • Teamwork & Accountability
  • Project Management

Nice to have

  • Knowledge of Robo-Guide and experience in interfacing Emulate 3D with Robo-Guide – for emulation of Robotic applications would be highly preferable.
  • Have basic or good knowledge of programming (C, C++, C-Sharp, J Script, Quick Logix) and related experience in applying scripting/coding skills for Components development in Emulate3D.
  • Software skills / certification
General Motors - All Job Offers

Looking for more opportunities?

Search for other job offers that match your skills and interests.

Suggested Tags: Frontend Developer Secretary Talent Manager Salesforce Administrator Data Analyst
Similar Jobs for

Sr Engineer- Emulation

8 matching positions

Sr. Firmware Engineer

The Sr. Firmware Engineer will develop and support our industry-leading traffic ...
Location
Location
Canada , Victoria
Salary
Salary:
100000.00 - 135000.00 CAD / Year
synapse-its.com Logo
Synapse - Manufacturing
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelors Degree in Electrical, Electronic, Computer Science or Computer Engineering
  • 8-15+ years’ experience in embedded software development and writing C and/or assembly code for microcontrollers such as Microchip PIC, Freescale/NXP, ST, Cortex M3/M0 and Atmel
  • Mastery of C language programming as it pertains to an embedded environment
  • Strong understanding of computer architecture and embedded software development best practices, with significant experience in low level development and programming
  • Real time development experience with and without an RTOS
  • Knowledge of communication interfaces, such as SPI, I2C, I2S, UART, CAN, USB, BLE, Wi-Fi, and Ethernet
  • Ability to read schematics to troubleshoot, debug and bring up new hardware using oscilloscopes, logic analyzers, protocol analyzers and in-circuit emulators
  • Experience programing peripheral hardware at the register level
  • Working knowledge of C++
  • Working knowledge of IoT principles and methods
Job Responsibility
Job Responsibility
  • Maintain and enhance embedded software for existing product lines
  • Own the embedded software system design cycle from requirements through launch and beyond
  • Design, develop, code, test, and debug embedded software
  • Integrate, verify, and validate new product designs and design changes
  • Perform design and code reviews
  • Interface with a cross-functional engineering team
  • Support the Tech Support team with intimate product knowledge
  • Contribute to a fun and innovative work environment
  • Work in an Agile environment using Atlassian toolset
What we offer
What we offer
  • Annual Bonus Program
  • Robust Health and Dental plan and Employee Assistance Program for you and your dependents
  • TELUS Health Virtual Healthcare
  • Health Spending Account
  • Health & Wellness subsidy
  • 3 weeks’ vacation to start, 4 weeks at 5-years
  • Generous unplanned emergency/sick days
  • Professional development and training
  • Secure bike cage
  • Shower facilities
  • Fulltime
Read More
Arrow Right

Sr Performance Benchmarking Engineer

You’ll join forces with CPU engineering teams across the UK to evaluate and enha...
Location
Location
United Kingdom , Cambridge
Salary
Salary:
Not provided
arm.com Logo
ARM
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Strong grasp of CPU micro-architecture concepts (pipelines, caches, predictors, MMUs)
  • Hands-on experience with low-level embedded C or assembly for coding, testing, optimisation, and debugging
  • Proficiency in Linux environments with strong scripting skills (Shell, Python, or Perl)
  • A strong academic background with a degree in Computer Science, Electronic Engineering, or a related field
Job Responsibility
Job Responsibility
  • Analyse and report CPU/IP performance across the full development cycle
  • Collaborate with designers and performance engineers to improve power, performance, and area (PPA) of IPs
  • Develop and enhance infrastructure that employs emulators, simulators, and FPGAs to evaluate performance and power
  • Provide actionable insights to customers, architects, and marketing teams on how IPs perform across different scenarios and use cases
What we offer
What we offer
  • Health and Wellness
  • Work and Life Success
  • Financial Rewards
  • Development and Support
  • Attractive relocation package
Read More
Arrow Right

Sr ASIC Design Verification Engineer (NetSec)

As a Design Verification engineer on the ASIC team, you will ensure that the ASI...
Location
Location
United States , Santa Clara
Salary
Salary:
Not provided
paloaltonetworks.com Logo
Palo Alto Networks
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • BS in EE, CE, or CS required or equivalent military experience required - MSEE preferred
  • Minimum 5 years experience in ASIC design verification
  • Demonstrated success in taking multiple ASIC products from concept to mass production
  • Expertise in SystemVerilog and UVM Technical strength in the following areas is required
  • Defining test plans, including comprehensive adversarial testing
  • Developing rich functional coverage models
  • Creating powerful and scalable test benches Implementing sophisticated self-checking infrastructure with reference models and scoreboards
  • Developing reusable constrained-random tests
  • Debugging failures
  • Closing coverage
Job Responsibility
Job Responsibility
  • Collaborate with engineers in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation, emulation, and formal verification
  • Plan and execute every aspect of simulation test plans using sophisticated coverage-driven, constrained-random methodologies
  • Develop flows, methodologies, and infrastructure for emulation
  • Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designers
  • Define new tools and methodologies to continuously improve quality and velocity
  • Create powerful programs in Python to automate triage, coverage closure, and metrics-driven verification
What we offer
What we offer
  • restricted stock units and a bonus
  • A description of our employee benefits may be found here
  • Fulltime
Read More
Arrow Right

Sr Performance Analysis & Benchmarking Engineer

You’ll join forces with CPU engineering teams across the UK to evaluate and enha...
Location
Location
United Kingdom , Cambridge
Salary
Salary:
Not provided
arm.com Logo
ARM
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Strong grasp of CPU micro-architecture concepts (pipelines, caches, predictors, MMUs)
  • Hands-on experience with low-level embedded C or assembly for coding, testing, optimisation, and debugging
  • Proficiency in Linux environments with strong scripting skills (Shell, Python, or Perl)
  • A strong academic background with a degree in Computer Science, Electronic Engineering, or a related field
Job Responsibility
Job Responsibility
  • Analyse and report CPU/IP performance across the full development cycle
  • Collaborate with designers and performance engineers to improve power, performance, and area (PPA) of IPs
  • Develop and enhance infrastructure that employs emulators, simulators, and FPGAs to evaluate performance and power
  • Provide actionable insights to customers, architects, and marketing teams on how IPs perform across different scenarios and use cases
What we offer
What we offer
  • Attractive relocation package
  • Health and Wellness
  • Work and Life Success
  • Financial Rewards
  • Development and Support
Read More
Arrow Right

Staff/ Sr Staff RTL Design Engineer

Synopsys software engineers are key enablers in the world of Electronic Design A...
Location
Location
India , Bengaluru
Salary
Salary:
Not provided
synopsys.com Logo
Synopsis Engineering
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 3-5 years of relevant experience in ASIC digital design and verification
  • Proficiency in RTL simulation, logic synthesis, and timing verification tools
  • Deep expertise in UVM, SystemVerilog, and protocol verification (e.g., IEEE1500, IEEE1687, AXI, AMBA)
  • Hands-on experience with VIPs and transactors in simulation and emulation environments
  • Strong understanding of DFT architectures, interconnects, and cache coherency protocols
  • Familiarity with debug tools such as Verdi and workflows for performance analysis
  • Programming skills in SystemVerilog, UVM, Verilog, C/C++, Python, and scripting languages like Tcl
  • Experience with EDA tools such as VCS, Verdi, and DC, and methodologies including VC Auto-Testbench and protocol compliance checking
Job Responsibility
Job Responsibility
  • Developing and modeling RTL logic in Verilog for embedded memory test and SLM IP blocks
  • Performing digital design validation and functional verification at both block and SoC levels
  • Executing logic synthesis, static timing analysis, and generating fault coverage reports to ensure robust designs
  • Applying DFT (Design-for-Test) expertise for comprehensive memory and logic testing
  • Identifying and troubleshooting design timing and DFT functional issues to optimize chip performance
  • Utilizing and scripting in languages such as Tcl to automate design and verification workflows
  • Defining architecture, logic, test bench designs, and embedded software functions for advanced test and analytics
  • Developing and maintaining technical collateral including test suites, protocol documentation, and debug guides
  • Collaborating with R&D and marketing teams to define new features, drive enhancements, and align product roadmaps
  • Delivering product training, managing customer support cases, and ensuring turnaround time (TAT) metrics are met or exceeded
What we offer
What we offer
  • Comprehensive medical and healthcare plans that work for you and your family
  • In addition to company holidays, we have ETO and FTO Programs
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
  • Save for your future with our retirement plans that vary by region and country
  • Competitive salaries
  • Fulltime
Read More
Arrow Right

Principal Product Manager - Virtualization Architect

Designs, plans, develops, and manages a product or portfolio of virtualization p...
Location
Location
United States , All
Salary
Salary:
Not provided
https://www.hpe.com/ Logo
Hewlett Packard Enterprise
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's degree or equivalent in computer science, engineering or related field of study
  • 10+ years of experience in product management, engineering, or a related technical role, with significant exposure to virtualization platforms and hypervisor technologies
  • Demonstrated hands-on or architectural familiarity with KVM, QEMU, libvirt, and the broader Linux virtualization stack
  • Deep technical knowledge of KVM hypervisor architecture, virtual machine lifecycle, vCPU scheduling, memory management (huge pages, NUMA), virtio device emulation, and hardware-assisted virtualization (Intel VT-x/AMD-V, IOMMU)
  • Strong understanding of virtualized networking (OVS, macvtap, SR-IOV, DPDK) and storage virtualization (virtio, iSCSI, NVMe-oF, Ceph/RBD) as they apply to KVM guest workloads
  • Familiarity with virtualization management and orchestration ecosystems - including libvirt APIs, oVirt, OpenStack Nova, and KubeVirt - and the ability to define product integration requirements across these layers
  • Extensive cross-functional leadership skills: ability to drive alignment across engineering, field, and partner organizations on complex, technically ambiguous virtualization platform initiatives
  • Strong financial and business acumen, including experience building business cases, defining performance metrics, and analyzing competitive positioning for infrastructure software products
  • Ability to provide product-specific technical training and enablement to sales, partners, and customer-facing teams on KVM and virtualization platform capabilities
  • Experience engaging with open-source ecosystems and upstream communities (Linux kernel, QEMU, libvirt, oVirt, OpenStack) as a product stakeholder
Job Responsibility
Job Responsibility
  • Independently leads end-to-end strategy and operational roadmap for one or more KVM-based virtualization products or a broader virtualization platform portfolio, spanning hypervisor core, management APIs, and guest ecosystem
  • Defines and drives the virtualization platform value proposition - including performance benchmarks, TCO advantages, and feature differentiation versus VMware, Hyper-V, and other competing hypervisor stacks - to support go-to-market and sales enablement
  • Synthesizes market and customer requirements (MRDs) by maintaining deep knowledge of enterprise virtualization use cases: VDI, server consolidation, cloud-native workloads, telco NFV/edge, and HPC virtualization
  • Translates KVM/QEMU/libvirt engineering capabilities into customer-facing requirements and product specifications, ensuring technical feasibility and roadmap alignment with upstream open-source communities (e.g., Linux kernel KVM subsystem, QEMU project)
  • Guides key stakeholders through all lifecycle phases - from hypervisor feature planning and kernel integration to product launch, sustaining engineering, and platform end-of-life planning
  • Collaborates across engineering, supply chain, and marketing to optimize product configuration, SKU design, pricing, and go-to-market strategies for virtualization platform offerings
  • Acts as a subject matter authority on KVM virtualization architecture, providing technical direction to internal teams, enabling sales and partner technical communities, and representing the product externally with customers and at industry forums
What we offer
What we offer
  • Health & Wellbeing
  • Personal & Professional Development
  • Unconditional Inclusion
  • Fulltime
Read More
Arrow Right

Systems Engineer

Vedo Systems is looking for a passionate systems engineer who is ready to apply ...
Location
Location
United States , Houston
Salary
Salary:
Not provided
vedosystems.com Logo
Vedo Systems
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Bachelor's degree in engineering
  • 5 years' experience in systems engineering, or a related technical field
  • Broad understanding across Systems Engineering Disciplines. Specifically, Systems Engineering and Integration, ConOps Development, Risk Assessment, Test Operations, Assembly and Integration, and Test and Verification
  • Software and/or hardware testing experience
  • Ability to learn tools and processes quickly
  • Organized, methodical approach to problem solving and information capture
  • Excellent written and verbal communication skills
Job Responsibility
Job Responsibility
  • Understand and decompose the SR-1F Concept of Operations
  • Coordinate with SR-1F stakeholders
  • Develop and review SR-1F Validation testing products, including integrated validation scenarios, detailed test objectives, test plans, and closure notices
  • Review Hazard Reports and other Systems Engineering and Integration (SE&I) data to support test planning
  • Engage in SR-1F Validation, Testing, and Operations meetings
  • build and review integrated validation and testing documentation as directed
  • Perform Risk Assessments for validation objectives and test scenarios to be used for test planning prioritization
  • Develop requirements for simulators and emulators to be used in Validation activities
  • Fulltime
Read More
Arrow Right

Business Development Sr. Manager

The Business Development Senior Manager entails responsibilities for working wit...
Location
Location
United States , Santa Clara
Salary
Salary:
186720.00 - 280080.00 USD / Year
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Progressive datacenter experience, with a strong record across key verticals
  • Strong historical relationships and engagement within the semiconductor industry
  • Strong understanding of enterprise technology adoption and vertical-specific business models
  • Able to operate effectively in fast-moving, cross-functional environments
  • Excellent communication, storytelling, and executive-level presentation skills
  • Familiarity with AI/ML stacks, enterprise software, and industry-specific digital transformation is a plus
  • Undergraduate degree in Electrical Engineering, Computer Science, or Computational Sciences preferred. MBA is a plus
Job Responsibility
Job Responsibility
  • Define and implement strategies to grow AMD's server business in the Semiconductor/EDA vertical through a solutions-based approach spanning CPU, GPU, and software
  • Conduct competitive, market, and partner capability assessments to shape actionable vertical expansion plans, and build the frameworks (market analysis, vendor evaluation, business case, partnership execution) that support them
  • Build and convert the Semiconductor/EDA pipeline through deep partnerships with semiconductor companies, foundries, EDA vendors (e.g., Synopsys, Cadence, Siemens EDA, Ansys), and ecosystem partners
  • Develop solution sets tied to key EDA and CAE workloads (e.g., RTL/logic simulation, physical verification, place-and-route, static timing analysis, DRC/LVS, SPICE, emulation, AI/ML-driven chip design), with joint value propositions and go-to-market plans to accelerate growth
  • Lead development of vertical-specific AI solutions in collaboration with ecosystem partners
  • Incubate POCs and pilots by orchestrating product, engineering, sales, and marketing teams, and turn them into scalable, repeatable offers with reference architectures and supporting collateral
  • Partner with server OEMs, the server systems channel, GSIs, and CSPs to converge on solutions addressing end-customer needs across on-prem, cloud, and hybrid deployments
  • Enable sales and marketing with targeted plays, collateral, and training
  • build cross-sales relationships to drive a unified approach in key Semiconductor/EDA accounts
  • Translate customer challenges into compelling value propositions that connect chip-level technology to system-level solutions
  • Fulltime
Read More
Arrow Right