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SOC Verification Manager

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AMD

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Location:
India , Hyderabad

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Contract Type:
Not provided

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Salary:

Not provided

Job Description:

We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

Job Responsibility:

  • Will be part of Server SOC Verification Team working at AMD Hyderabad/ Bangalore, India
  • Responsible for Developing testbench components for SOC Design Verification
  • Writing/Enhancing BFM/Checkers/Monitors/Other-SOC Verif Env's
  • Bringing up Testbench with comprehensive verification plan and implementation of test cases
  • Work with a cross geographic teams, IP/SOC-Architects, Design Verification Stakeholders, ensure required Verif Env exists for verifying Design of Next-Gen Server architecture

Requirements:

  • 13-16 years of experience required
  • Fair understanding of Processor based SoC Design Verification is required
  • Prior work experience of working on PCIe/CXL/USB/SATA IP's at IP Level or Sub-System Level Verification is a plus
  • Strong background of MIPS/X86/ARM Processor based IP/Sub-System Level Verification is desired
  • Know-How about SOC Micro-Arch flows (Reset, Boot flow, Cache/Coherency, System Memory) is desired
  • Good understanding on Testbench Concepts, strong hands-on expertise in SV/UVM is must
  • Developing and improving SV/UVM based testbench for functional verification of Processor and its components
  • IP/Sub-System Verification background with Processor based Testbench is a must
  • Good debugging skills using Simulator Waveform/Trace logs is required
  • Prior exposure of working with any ISA simulator model based verification is a plus
  • Prior work experience on High-Speed Serials - PCIe/CXL/USB/SATA/GT IP's is preferred
  • Self-motivated and adaptable to fast-moving design verification environment
  • Willing to take up additional responsibilities to contribute to the team’s success
  • Manager with ~3-4 years of managerial experience
  • SOC Integration know-how
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Nice to have:

  • Prior work experience of working on PCIe/CXL/USB/SATA IP's at IP Level or Sub-System Level Verification
  • Strong background of MIPS/X86/ARM Processor based IP/Sub-System Level Verification
  • Know-How about SOC Micro-Arch flows (Reset, Boot flow, Cache/Coherency, System Memory)
  • Prior exposure of working with any ISA simulator model based verification
  • Prior work experience on High-Speed Serials - PCIe/CXL/USB/SATA/GT IP's

Additional Information:

Job Posted:
March 19, 2026

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