SOC Verification Manager/Lead

• Define and drive the overall SoC verification strategy for complex multi-billion transistor SoCs
• Architect and develop scalable, reusable, and robust SoC verification environments using industry-standard methodologies
• Lead end-to-end verification planning, execution, coverage closure, and sign-off activities
• Drive power management verification, including validation of power state transitions, power controllers, reset sequencing, clock management, and power domain interactions
• Lead low-power verification using UPF/CPF methodologies and ensure compliance with low-power design intent
• Develop and review verification architectures, test plans, assertions, checkers, scoreboards, and coverage models
• Collaborate closely with architecture, RTL design, firmware, emulation, validation, and physical design teams
• Drive debug and root-cause analysis of complex SoC-level issues
• Establish verification best practices, automation frameworks, and verification metrics
• Support verification across simulation, emulation, FPGA prototyping, and post-silicon validation environments
• Mentor and technically lead a team of verification engineers
• Participate in design reviews and contribute to architecture discussions from a verification perspective

• 12–20 years of experience in VLSI Design Verification with a strong focus on SoC verification
• Proven experience in SoC-Level Verification, SoC Verification Architecture, Power Management Verification, Low-Power Verification, Functional Verification and Coverage Closure
• Strong understanding of SoC architectures involving CPUs, interconnects, memory subsystems, peripherals, and accelerators
• Expertise in SystemVerilog and UVM-based verification methodologies
• Hands-on experience with assertion-based verification (SVA)
• Strong experience with UPF/CPF and power-aware simulation flows
• Deep understanding of power domains, retention strategies, isolation techniques, level shifters, dynamic voltage and frequency scaling (DVFS), power state management
• Experience with verification planning, coverage analysis, and regression management
• Strong debugging skills in complex SoC environments
• Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related field

• Experience with emulation and FPGA prototyping platforms
• Exposure to firmware-assisted verification and hardware/software co-verification
• Experience in AI/ML, networking, automotive, mobile, data center, or high-performance computing SoCs
• Knowledge of formal verification techniques
• Scripting proficiency in Python, Perl, or Shell

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