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Silicon Design Engineer

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AMD

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Location:
Malaysia , Penang

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Category:
IT - Software Development

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Contract Type:
Not provided

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Salary:

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Job Description:

PCIe SubSystem team delivers industry leading high-performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles. PCIe IP is one of the most important IP in all AMD’s projects. So, this role provides a great opportunity to work on the most advanced PCIe technology with the global team Architects/Designers/DV on PCIe SS IP Verification.

Job Responsibility:

  • Develop and update infrastructure and environment for IP level design verification
  • Closely working with Design and Architecture team to develop new verification component
  • Responsible for PCIe SS IP new features verification plan and verification closure.

Requirements:

  • Solid background with ASIC design verification flow and multiple ASIC tape out experience with 8+ years
  • Team leading experience and experienced on testbench architecture
  • Solid knowledge on UVM, SystemVerilog, Verilog
  • Solid background on PCIe is preferred, other high speed IO protocol or Serdes PHY is also a big plus
  • Low power verification work experience is a plus
  • Knowledge on formal verification is a plus
  • Fluent written English for technical discussion among global team, vocal is a plus
  • Bachelors or Masters degree in computer engineering/Electrical Engineering with 5+ years’ experience in digital ASIC/SOC design verification.

Nice to have:

  • Solid background on PCIe is preferred, other high speed IO protocol or Serdes PHY is also a big plus
  • Low power verification work experience is a plus
  • Knowledge on formal verification is a plus
  • Fluent written English for technical discussion among global team, vocal is a plus.

Additional Information:

Job Posted:
March 21, 2026

Work Type:
Hybrid work
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