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AMD · IT - Software Development

Silicon Design Engineer

China, Shanghai · Job Posted June 10, 2026

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Job Description

CIT (Chiplet Interconnect Technology) team delivers industry leading high-performance interconnects IP for all AMD products including Server, GPU, Client and Game consoles. CIT includes AMD Internal links as well as Industry Standard links for on-chip connections. We are searching for a designer to join the fast-growing CIT team, and be responsible for defining, specifying, and implementing current and future high-speed I/O IPs. The candidate will be involved in digital design and will be to work on the micro-architecture of leading IPs.

Job Responsibility

Defining and implementing the RTL of a new AMD chiplet interconnect IP
Participate in RTL implementation for functional blocks of the IP
Optimize RTL implementation from implementation perspective in cooperation with RTL and Architecture teams
Optimization of physical implementation in cooperation with Physical Design team
Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA)

Requirements

Experience in digital front-end implementation, including micro-arch. definition
Experience with state-of-the-art industry standard digital tools
RTL design experience with multi-clock, high frequency designs
Knowledge in digital RTL Design and Implementation
Basic understanding in high-speed I/O protocols (PCIe, UCIe…)
Candidate is preferred to be MSEE or BSEE with 6+ years experience in digital ASIC design.

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Silicon Design Engineer

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