Silicon Design Engineer

As one of IP design team members, own for IP level design work, including architecture define (partly own or join), spec documentation, RTL coding, RTL delivery and signoff The target IP is used for all AMD mainstream products, product generation upgrade, reusability and scalibility need to be considered in architecture define and RTL maintain, as well as compliant to system application and sw/fw/hw cooperation. Need to co-work with other teams closely, include communication with AMD global soc architect and IP architect, closely work with verification team, trace and support backend work, silicon validation support. The IP team will have flexible work assignment, respect to indificual interest and the team target to achieve win-win, encourage and help individuals to discuss with global senior architectures and engineers for variants of topics and work together to resolve problems, aimed to improve both the team and individuals’ IP design capability and competivity.