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CIT (Chiplet Interconnect Technology) tam delivers industry leading high-performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles. As the team member, you will have access to cutting-edge technology/tools/process, all stages of functional verification on CIT IP, including test plan & test development, regressions, and infrastructure development. A successful candidate will work with global silicon design and verification engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.
Job Responsibility:
Create test plans and host the review with all stakeholders
Work on CIT IP module and subsystem level verification
Perform regression/sanity maintain and debug
Support IP deployment in SOC
Support IP bring up on silicon
Requirements:
Bachelor or MS in EE, ME, CS or related
10+ years of DV experience
Expertise in UVM
Highly motivated, innovative individual with a keen interest in finding and resolving issues
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