Signals Processing Engineer Job at 2HB (Annapolis Junction)

Senior FPGA / RTL Design Engineer - Signal Processing

Silvus is seeking a Senior FPGA/RTL Design Engineer who will report to the Direc...

Location

United States , Irvine

Salary:

125000.00 - 195000.00 USD / Year

Silvus Technologies (International)

Expiration Date

Until further notice

Requirements

Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields
Minimum 6 years of demonstrated experience in FPGA design
4 years of FPGA design experience with a Master of Science degree
2 years of FPGA design experience with a PhD
Demonstrated experience with fixed point binary arithmetic and digital signal processing designs
Proven expertise working with multiple clock-domain, high-utilization FPGA designs
Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
Must be a U.S. Citizen due to clients under U.S. government contracts
All employment is contingent upon the successful clearance of a background check

Job Responsibility

Digital design architecting for wireless communication projects
Fixed point design of signal processing blocks while working with systems engineers
RTL coding, simulation, and test bench development
FPGA synthesis and timing closure
Hardware verification and troubleshooting
familiarity with logic analyzers
Provide support to the RF and Software Engineering teams

Fulltime

AI Research Engineer - Signal Processing

At Helsing, we deliver AI-based capabilities and the enabling foundation that al...

Location

Germany , Munich; Berlin

Salary:

Not provided

Helsing

Expiration Date

Until further notice

Requirements

Hold an MSc in signal processing, machine learning, robotics, communication engineering or related field with experience in conceptualising, implementing and thoroughly evaluating advanced AI-based systems
Have excellent communication skills and the ability to report and present research findings clearly and efficiently both internally and externally
Are passionate about keeping up to date with current research and enjoy reimplementing / extending the state-of-the art in ML/AI
Possess solid software engineering skills, writing clean and well-structured code in Python and/or languages like Rust, Java, or modern C++

Job Responsibility

Develop and extend the state-of-the-art in signal processing, applying and deploying the technology in real-world scenarios
Contribute to projects and will collaborate with people across several teams and backgrounds
Build in-house solutions for signal processing problems that we face, in the sky or underwater

What we offer

Competitive compensation and stock options
Relocation support
Social and education allowances
Regular team, company events, and all-hands to bring together employees as one team across Europe
A hands-on onboarding program

Fulltime

Principal FPGA / RTL Design Engineer - Signal Processing

Silvus is seeking a Principal FPGA / RTL Design Engineer- Signal Processing who ...

Location

United States , Irvine

Salary:

165000.00 - 250000.00 USD / Year

Silvus Technologies (International)

Expiration Date

Until further notice

Requirements

Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields
Minimum 10 years of demonstrated experience in RTL design and FPGA implementation
8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields
Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs
Deep knowledge of RTL design fundamentals using Verilog and System-Verilog
Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs
Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
Must be a U.S. Citizen due to clients under U.S. government contracts
All employment is contingent upon the successful clearance of a background check

Job Responsibility

Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks
RTL coding, simulation, and test bench development
FPGA synthesis and timing closure
Hardware verification and troubleshooting
familiarity with logic analyzers
Provide support to the RF and Software Engineering teams

Fulltime

Principal FPGA / RTL Design Engineer - Signal Processing

Participate in all aspects of the research and development process from concept ...

Location

United States , Los Angeles

Salary:

165000.00 - 250000.00 USD / Year

Silvus Technologies (International)

Expiration Date

Until further notice

Requirements

Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields
Minimum 10 years of demonstrated experience in RTL design and FPGA implementation
8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields
Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs
Deep knowledge of RTL design fundamentals using Verilog and System-Verilog
Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs
Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
Must be U.S. Person (U.S. Citizen, or Permanent Resident) due to clients under U.S. federal contracts
All employment is contingent upon the successful clearance of a background check

Job Responsibility

Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks
RTL coding, simulation, and test bench development
FPGA synthesis and timing closure
Hardware verification and troubleshooting
familiarity with logic analyzers
Provide support to the RF and Software Engineering Teams

Fulltime

Student Assistant – Wireless Signal Processing

The SHK will investigate state of the art simulation and digital signal processi...

Location

Germany , Dresden

Salary:

Not provided

Barkhausen Institut gGmbH

Expiration Date

Until further notice

Requirements

Study of electrical engineering, computer science or comparable
Good communication and writing skills in English
Knowledge of high-level object-oriented programming, preferably Python
Basic knowledge of digital signal processing techniques

Job Responsibility

Contribute source code and extend documentation of a Python codebase
Reproduce cutting edge wireless signal processing research results
Supervise software defined radio measurement setups

What we offer

An open and creative team of enthusiastic scientists
Office and laboratory space directly in Dresden’s city center
Agile working hours and workflows
Work on future technologies
The option to derive a supervised thesis topic from your work
Part-time work
Mobile working and flexible working hours that take family needs into account
Support for arriving in Dresden (all formalities, apartment etc.)

Parttime

Student assistant – wireless signal processing

The SHK will investigate state of the art simulation and digital signal processi...

Location

Germany , Dresden

Salary:

Not provided

Barkhausen Institut gGmbH

Expiration Date

Until further notice

Requirements

Study of electrical engineering, computer science or comparable
Good communication and writing skills in English
Knowledge of high-level object-oriented programming, preferably Python
Basic knowledge of digital signal processing techniques

Job Responsibility

Contribute source code and extend documentation of a Python codebase
Reproduce cutting edge wireless signal processing research results
Supervise software defined radio measurement setups

What we offer

An open and creative team of enthusiastic scientists
Office and laboratory space directly in Dresden’s city center
Agile working hours and workflows
Work on future technologies
The option to derive a supervised thesis topic from your work
Part-time work
Mobile working
Flexible working hours that take family needs into account
Support for arriving in Dresden (all formalities, apartment etc.)

Parttime

Learning Process Engineer

This is a career-defining opportunity to play a crucial role in a hyper-scale AI...

Location

United States , Salt Lake City

Salary:

Not provided

PassiveLogic

Expiration Date

Until further notice

Requirements

Technical background in computer science, AI/ML, data engineering, or knowledge systems
Experienced with graph databases (Neo4j, TigerGraph, Weaviate, Neptune), Python/C++, graph query languages (Cypher, Gremlin, GraphQL, SPARQL), graph ML/embeddings, and building ETL pipelines, event-driven systems, and real-time feedback loops
Understanding of feedback-driven model improvement, reinforcement learning, or adaptive systems
Experience working cross-functionally with engineers, designers, and product managers
Analytical mindset: ability to define success metrics, run experiments, and interpret results
Excellent communication skills and a collaborative, problem-solving approach
Background in process engineering, systems design, product operations, or applied AI/ML
Strong systems thinking: ability to model complex workflows and simplify them into actionable processes
Familiarity with human-in-the-loop learning, adaptive systems, or feedback-driven workflows
Proven experience: 5+ years in developing software with an ecosystem nature

Job Responsibility

Architect feedback pipelines: Build and maintain data ingestion and labeling processes that transform user interactions into structured learning signals
Design graph-based knowledge structures: Model, update, and optimize workflows in a graph database (e.g., Neo4j, ArangoDB, Weaviate, or similar)
Implement adaptive logic: Use graph queries and embeddings to inform recommendations, predictions, and workflow adaptation
Integrate human-in-the-loop learning: Deploy mechanisms that incorporate user corrections and contextual feedback into graph representations and model updates
Collaborate with ML and software engineers: Define retraining strategies, model evaluation criteria, and experiment frameworks that leverage graph-based data
Automate performance monitoring: Develop dashboards and metrics for tracking how graph-driven learning impacts system accuracy, adoption, and efficiency

What we offer

Competitive compensation
Generous equity share package
Medical, dental and vision coverage
Disability and life Insurance options
Flex PTO
Team-building events
Free catered lunch in the office Monday — Friday
Free ski pass (We are at the base of Big Cottonwood Canyon)
Free National Park pass
Onsite Gym

Fulltime

Learning Process Engineer

We’re building the next generation of AI-powered productivity tools for autonomo...

Location

Netherlands , Amsterdam

Salary:

Not provided

PassiveLogic

Expiration Date

Until further notice

Requirements

Technical background in computer science, AI/ML, data engineering, or knowledge systems
Experienced with graph databases (Neo4j, TigerGraph, Weaviate, Neptune), Python/C++, graph query languages (Cypher, Gremlin, GraphQL, SPARQL), graph ML/embeddings, and building ETL pipelines, event-driven systems, and real-time feedback loops
Understanding of feedback-driven model improvement, reinforcement learning, or adaptive systems
Experience working cross-functionally with engineers, designers, and product managers
Analytical mindset: ability to define success metrics, run experiments, and interpret results
Excellent communication skills and a collaborative, problem-solving approach
Background in process engineering, systems design, product operations, or applied AI/ML
Strong systems thinking: ability to model complex workflows and simplify them into actionable processes
Familiarity with human-in-the-loop learning, adaptive systems, or feedback-driven workflows
Proven experience: 5+ years in developing software with an ecosystem nature

Job Responsibility

Architect feedback pipelines: Build and maintain data ingestion and labeling processes that transform user interactions into structured learning signals
Design graph-based knowledge structures: Model, update, and optimize workflows in a graph database (e.g., Neo4j, ArangoDB, Weaviate, or similar)
Implement adaptive logic: Use graph queries and embeddings to inform recommendations, predictions, and workflow adaptation
Integrate human-in-the-loop learning: Deploy mechanisms that incorporate user corrections and contextual feedback into graph representations and model updates
Collaborate with ML and software engineers: Define retraining strategies, model evaluation criteria, and experiment frameworks that leverage graph-based data
Automate performance monitoring: Develop dashboards and metrics for tracking how graph-driven learning impacts system accuracy, adoption, and efficiency

What we offer

Competitive compensation
Generous equity share package
Pension plan
Paid time off
Commute Coverage (NS Business Card or Car allowance)
In Office Lunch
Fun office-wide activities quarterly
Worldwide ski/snowboard pass

Signals Processing Engineer

2HB

Location:
United States , Annapolis Junction

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Requirements:

Additional Information:

Job Posted:
January 05, 2026

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Job Description:

Requirements:

Additional Information:

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