Signal Integrity Engineer, Intern Job at Meta (Menlo Park)

Signal Integrity and Power Integrity Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Raleigh

Salary:

100600.00 - 199000.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 2+ years technical engineering experience OR equivalent experience
MS degree with minimum 3+ years of experience in silicon/package/system signal integrity and power delivery
BSEE degree with minimum 5 years’ experience in silicon/package/system signal integrity and power delivery
Strong foundation and expert in the field of Signal and Power Integrity and delivery, System design, IP design with knowledge on product development with minimum 5 years’ experience in design and electrical modelling
Good working knowledge in the field of end to end system SIPI Design and Architecture
Industry knowledge, trends and landscape of technologies to drive development across Silicon-IP, Advanced packaging, Substrate technology, Board technology and Platform design
Excellent interpersonal skills including written and verbal communication, teamwork, negotiation, and presentation
Experience with high-speed signal design and power integrity modelling for HPC products
Strong foundation in advanced packaging technologies as it relates to Signal and Power integrity
Experience with Foundry Silicon technologies, OSAT technologies and Substrate technologies

Job Responsibility

SIPI engineer for compute and AI SoCs and platforms – Implement strategies for end-to-end power delivery design and signal integrity design from Silicon to Package, and linking to Platform to System and Cloud
Deliver SIPI solutions that meet the HPC demands across the entire system
Drive future power and signal integrity solutions for chiplet architecture with advanced packaging and advanced silicon nodes
Design, model, and simulate SI and PI (i.e., incl. IP design, voltage regulator, motherboard, CPU package, silicon, and decoupling capacitor solution) for data center processors and corresponding platforms to ensure optimized performance
Performs DC, AC and transient simulation to provide noise, impedance profile of the whole power delivery path and link/electrical simulations to validate I/O performance from platform to silicon
Work closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers
Drives the execution of architecture solutions across product lines or multiple product groups across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry best practices, and lessons learned from teams working across multiple product lines
Drives engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs

Fulltime

Senior Signal Integrity and Power Integrity Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Raleigh

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter

Job Responsibility

Implementing strategies for end-to-end signal integrity design from Silicon to Package, and linking to Platform to System and Cloud
Delivering SIPI solutions that meet the HPC demands across the entire system
Driving future power and signal integrity solutions for chiplet architecture with advanced packaging and advanced silicon nodes
Designing, modeling, and simulating SI and PI for data center processors and corresponding platforms to ensure optimized performance. Performs link/electrical simulations to validate I/O performance from platform to silicon
Working closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers
Driving the execution of architecture solutions across product lines or multiple product groups across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry best practices, and lessons learned from teams working across multiple product lines
Driving engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs

Fulltime

Calibration Engineer Intern (Signal Processing/Physics Motion)

The Bosch Group is a leading global supplier of technology and services. Since t...

Location

Vietnam , Ho Chi Minh City

Salary:

Not provided

Robert Bosch Sp. z o.o.

Expiration Date

Until further notice

Requirements

Final-year student Automotive/Electrical/Physical/Mechatronic Engineering or related field
Internship Model: Full-time or at least 4 days/week
Official university recommendation letter with stamp (mandatory)
Basic knowledge on Physics/Dynamics motion
Basic knowledge on Signal Processing and Analysis
Good at English communication skill
Good time management skill and logical thinking
Good Teamwork (open, willing to integrate and work in a team)

Job Responsibility

Get vehicle crash data from lab (measured by sensors and recorded during crash) and process them into crash database for simulation
Calibrate algorithm parameters to reach airbags deployment performance of customer requirement and regulation (CN-NCAP, EU-NCAP, ASEAN-NCAP..) by Bosch internal tool
Prepare Calibration Report to customer

What we offer

Monthly Internship allowance
Meal & Parking allowance
1 day of paid leave per month
Good benefits of Trade Union activities, team building and company trip
Opportunity to work in global projects of fast developing company and being a part of innovation team contributing initiative ideas to the hi-tech world
Engage in our diverse training programs which surely help strengthen both your personal and professional skills

Fulltime

Graduate Trainee - Product Development Engineer (Signal Integrity)

As Signal Integrity Design Engineer, you will be responsible for SI specificatio...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Bachelor's or Master's in electrical engineering, computer engineering, or comparable disciplines
Electromagnetic modeling of 3-D structures including vias, connectors, sockets
System-level signal integrity simulations of DDR5 memory bus
System-level signal integrity simulations of high-speed SERDES links such as USB-4, PCIe5, xGMI/CXL
Expertise in analog simulation with Seasim, S2eye, Hspice, ADS, ANSYS, or other toolsets
Expertise in 3-D modeling with ANSYS HFSS/Q3D and 2.5-D with ANSYS SIWAVE
Expertise with DSO, TDR, VNA, ParBERT measurement tools/techniques

Job Responsibility

Work closely with cross-functional team and internal working group on current and next gen Server's platform in meeting signal integrity in HVM solution space
Electromagnetic modeling of 3-D structures including vias, connectors, sockets
Verify and correlate post-silicon measurement against spec and collaborate fixes if needed to feedback on the next derivation silicon
Collaborate with working group leads for signal measurement test plans and review of measurement results
Deliver channel optimization (board and package), model creation and verification and simulate the overall performance to meet the channel performance
Be part of the team to develop and enhance next generation product and methodology
Board/system-level power delivery network AC+DC simulation for low-voltage/ high-current supplies
Work with external and internal IP providers to ensure IPs performance and their proper functionality in our products
System-level signal integrity simulations of future DDR5 memory bus including silicon IO, package, and board
System-level signal integrity simulations of future high-speed SERDES links such as USB-4, PCIe5, xGMI/CXL, etc. including silicon IO, package, and board

Fulltime

Principal Signal and Power Integrity Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Raleigh

Salary:

142800.00 - 274800.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.

Job Responsibility

PI engineer for compute and AI SoCs and platforms – Implement strategies for end-to-end power delivery design from Silicon to Package, and linking to Platform to System and Cloud
Deliver SIPI solutions that meet the HPC demands across the entire system
Drive future power delivery solutions for chiplet architecture with advanced packaging and advanced silicon nodes
Design, model, and simulate PI (i.e., incl. IP design, voltage regulator, motherboard, CPU package, silicon, and decoupling capacitor solution) for data center processors and corresponding platforms to ensure optimized performance. Performs DC, AC and transient simulation to provide noise, impedance profile of the whole power delivery path and link/electrical simulations to validate I/O performance from platform to silicon
Work closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers
Drives the execution of architecture solutions across product lines or multiple product groups across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry practices, and lessons learned from teams working across multiple product lines
Drives engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs

Fulltime

Senior Signal and Power Integrity Engineer

At Cisco, Bangalore, the Common Hardware Group (CHG) architects, designs, builds...

Location

India , Bangalore

Salary:

Not provided

Duo Security

Expiration Date

Until further notice

Requirements

Bachelor's or Master’s Degree in Electrical Engineering
6+ yrs of demonstrated ability in hardware design with emphasis on Signal and Power Integrity
Hands on exposure to lab measurements including real-time scope, sampling scope, Spectrum analyzer, VNA & TDR
Good understanding of EM and transmission line concepts, timing, jitter, crosstalk, noise, channel modeling, channel equalization techniques, power delivery & decoupling
Experience with 56G PAM4, 25G & 10G NRZ Serdes technologies, and DDR - simulation, bring up, debug, measurements, and optimization
Thorough knowledge of PCB stack-up design - standard processes, performance vis-à-vis PCB materials, surface finishes, vendor capabilities, and manufacturing trade-offs
Proficiency with simulation and analysis tools like ADS, HFSS, HSPICE, Cadence Allegro, PowerSI, MATLAB, and Hyperlynx
Excellent oral and written communication skills and capability to present concepts, analysis, and updates to larger teams and forums

Job Responsibility

Be responsible for delivering system-level signal and power integrity solutions for large sophisticated high-speed systems, boards & packages
Develop SI rules, review design implementation, build test plans, and document characterization & measurement reports
Improve & optimize design margins through interconnect, timing and crosstalk analysis, 3D EM & channel simulations for high-speed designs
Design & characterize test structures & channel models to correlate simulations with measurements for Serdes and interconnects
Collaborate with multi-functional teams - HW, PCB Layout, SW, MFG, ASIC
Be responsible for electrical characterization and verification of Transmitter/Receiver SERDES settings to meet the industry standards and internal Cisco requirements

Senior Hardware Engineer - Signal Delivery

The Innovation Lab is an advanced R&D team that is part of the Semiconductor Tes...

Location

United States , North Reading

Salary:

175300.00 - 280600.00 USD / Year

Teradyne

Expiration Date

Until further notice

Requirements

Bachelor’s or Master’s degree in Electrical Engineering or related field
Minimum 7 years of experience in signal integrity or high-speed hardware design
Proven experience with signal delivery in advanced semiconductor systems
Strong working knowledge interconnect standards
Experience working with microbump technology and its impact on signal integrity
Familiarity with fine pitch probing techniques and associated challenges
Proficiency in simulation tools such as Ansys HFSS, SIwave, ADS, or equivalent
Experience with PCB layout tools and design for signal integrity
Familiarity with lab equipment for signal validation (oscilloscopes, TDR, VNA)
Strong analytical and problem-solving skills

Job Responsibility

Lead the design and analysis of high-speed signal delivery systems supporting high speed industry data interfaces such as PCIe, UCIe, etc.
Develop simulation models and perform signal integrity analysis to ensure robust performance across various operating conditions
Collaborate with cross-functional teams including packaging, PCB layout, and silicon design to optimize signal paths and microbump connections
Build and validate prototypes to test signal delivery performance and compliance of system probe card interfaces including microbump and fine pitch probing specifications
Support product development from concept through production, ensuring signal integrity and reliability
Ensure compliance with industry standards and internal quality metrics
Drive PCB design efforts involving very large panels, high layer count sequential builds, and fine pitch sequential lamination
Lead development of ultra-fine pitch MLO (Multi-Layer Organic) substrates with embedded active and passive components
Coordinate and manage cross-site, global engineering teams to ensure alignment and execution across time zones
Provide clear, data-driven risk assessments and mitigation strategies to management and stakeholders

What we offer

Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more
This job is eligible for discretionary bonus(es) based on financial performance

Fulltime

Senior Quantum Analog Mixed-Signal Verification Engineer

At Microsoft Quantum, we aim to empower science and scientists to solve the worl...

Location

United States , Redmond

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position
OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment
OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment
OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Citizenship & Citizenship Verification: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations (ITAR) or Export Administration Regulations (EAR), the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status (e.g., under 8 U.S.C. § 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation).
Ability to work in an 'AI-first' environment using modern AI tools to accelerate discovery through hardware development.

Job Responsibility

Own and drive Analog Mixed-Signal (AMS) simulation of complex analog and digital blocks, including building analog block models, preparing and executing test plans, and supporting analog and AMS verification activities through tape-out
Integrate analog and digital blocks across multiple SoCs to create a system-wide simulation environment for system-level algorithm modeling
Coordinate with Analog Verification Engineers to run block-level and top-level analog and AMS simulations. Document results, present findings, drive design resolution, and provide status reports to track program metrics
Build behavioral models for part or all of the analog components to support AMS verification, and provide models for full-chip digital verification
Coordinate with internal team members and contractors, including screening and onboarding contractors as needed to complete deliverables
Establish standardized AMS verification and modeling methodology with peers
Other
Embody our culture and values

Fulltime

Select Country

Signal Integrity Engineer, Intern

Job Description

Job Responsibility

Requirements

Nice to have

Looking for more opportunities?