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AMD Logo AMD · IT - Software Development

Server Memory Validation Lead

China, Shanghai · Job Posted January 29, 2026
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Job Description

As a Principal Member of Technical Staff (PMTS), you will play a pivotal role in the enablement and validation of memory interfaces for cutting-edge processor silicon. Your responsibilities will include leading efforts to innovate, test, and debug within the memory sub-system of new processors, as well as consistently interacting and collaborating with memory vendors. A key part of your role will involve the enablement, debugging, and qualification of these vendors to be included in the Approved Vendor List (AVL). This role requires advanced technical expertise, leadership, and strategic vision to drive efficiencies and quality improvements.

Job Responsibility

  • Lead, mentor, and manage a high-performing team of validation engineers dedicated to memory sub-system validation on AMD Server platforms
  • Provide strategic technical direction and leadership in the development of sophisticated test and validation plans for DDR interfaces
  • Design and implement comprehensive system-level memory sub-system validation test plans across AMD products, continually seeking innovation
  • Facilitate collaboration with silicon design teams, firmware, software, and automation teams to ensure smooth integration and validation processes
  • Consistently interact and collaborate with local memory vendors for enablement, debugging, and qualification to be included in the Approved Vendor List (AVL)
  • Deliver insightful project reports, analyze risks, and propose innovative solutions, ensuring timely resolution and strategic foresight
  • Utilize smart data analysis to constantly refine processes, enhance efficiency, and drive quality improvements across validation methodologies
  • Identify strategic opportunities to elevate validation processes, enhance automation tools, and drive methodologies for improved efficiency and effectiveness

Requirements

  • Master’s degree with 10+ years of experience or a Bachelor's degree with 12+ years of demonstrated expertise in the development & execution of platform level electrical & functional test plans
  • Extensive hands-on experience and profound expertise in debugging I/O interfaces such as DDR memory systems
  • Proven experience in vendor management and AVL qualification processes
  • Thorough familiarity with signal measurement equipment, schematics, and layout documentation
  • Exceptional written and verbal communication skills, adept at conveying complex technical information
  • Advanced programming skills in Python, Ruby, Perl, or similar languages
  • Demonstrated self-motivation, strategic thinking, and program management skillsets, with a focus on innovation and team leadership

Nice to have

DDR/GDDR/LPDDR Memory test experience on electronic components such as Processors would be considered a big plus

What we offer

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