Serdes Systems Validation Engineer Job at BLUESTREAM PEOPLE (Hampshire)

Software Engineer Sr Staff - Platforms Developer

Designs, develops, troubleshoots and debugs software programs for software enhan...

Location

India , Bangalore

Salary:

Not provided

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor’s or master’s degree in computer science, electronics, telecommunication engineering, or a related discipline
14 to 19 years of experience in networking and system software development
Proficiency in C and C++ programming
Familiarity with data structures and system debugging techniques
Expertise in Host Complex, System Peripherals & Drivers: CPU complex (x86)
PCIe, SPI, I2C, MDIO
FPGA, CPLD, Flash Drivers
Expertise in Ethernet Interfaces (ranging from 1Gig to 400G+, including 800G, 1.6T), MacSec, Timing, Optics (SFP, QSFP, QDD, OSFP)
Expertise in High-speed packet forwarding with network processors, PHYs, and SerDes
Cloud Architectures

Job Responsibility

Collaborate with product managers, architects, and other engineers to define software requirements and specifications
Design, implement, and maintain networking and system software components using C and C++ programming languages
Conduct object-oriented analysis and design to ensure robust and scalable solutions
Debug complex system-level issues, leveraging your deep understanding of fundamental OS concepts (especially in Linux or similar operating systems)
Participate in hardware and system-level design discussions, ensuring carrier-class software development
Work with Linux device drivers, system bring-up, and the Linux kernel
Navigate large codebases effectively
Apply strong technical, analytical, and problem-solving skills to enhance software performance and resilience
Utilize scripting technologies and modern DevOps practices
Collaborate with cross-functional teams, including networking, embedded platform software, and hardware experts

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

Senior Silicon Validation Engineer

HPE is seeking a Senior Silicon Validation Engineer to help validate the functio...

Location

United States , Ft. Collins

Salary:

142000.00 - 270000.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

May 28, 2026

Requirements

Bachelor’s or master’s degree in electrical engineering, computer engineering, computer science or equivalent
6-10+ years of experience in VLSI Validation, verification, or design, including experience leading teams or complex projects
Senior level proficiency in object-oriented Python programming
Senior level proficiency in Linux command line, Verilog hardware description language, electronic design automation (EDA)
Senior level experience in ASIC Silicon Validation and testing is required
Senior level knowledge of industry standard networking protocols is required. (200G/400G/800G+ Ethernet, 50G/100G/200G+ SERDES (Die to Die as well as long reach))
Executive written and verbal communication skills
mastery in English
Must hold U.S. citizenship, U.S. lawful permanent resident/Green Card status

Job Responsibility

Oversees full chip-level validation, utilizing emulators and developing tests that run at the operating system level to assess both HPE Slingshot and industry standard networking protocols
Provides technical leadership for the HPE Slingshot Silicon Validation engineering team, responsible for all stages of ASIC validation for Network Interface Cards (NIC) and Switch hardware
Provides technical leadership and guidance to cross-organization projects and activities
Owns the validation strategy and risk management for major projects
Drives innovation and integration of new technologies and methodologies into Silicon Validation projects and activities
Provides input on the selection and development of future technical leaders
Mentors and develops less experienced staff members, setting an example of innovation and excellence in Silicon Validation
Represents the organization in external engagements, including partner collaborations and industry forums
Collaborates and communicates with management and internal partners regarding validation status, project progress, and issue resolution

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

Senior R&D Hardware Engineer

As a Senior Hardware Design Engineer, you will be part of a dynamic and highly s...

Location

United States , Roseville

Salary:

115500.00 - 266000.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

10+ years of experience in hardware system design and/or high-speed board designs
Proficient with Cadence schematic and PCB design tools like Concept, Orcad and Allegro
Strong technical foundation in high-speed (Gbps) physical design, signal integrity principles and power distribution techniques
Hands-on experience with lab design verification activities and troubleshooting complex system issues relating EMI/EMC, reliability and serdes I/O
Knowledge of programming languages such as Python, Perl and Matlab
Must possess a bachelor’s or master’s degree in electrical engineering or related fields

Job Responsibility

Hardware specification, PCA circuit design, component selection, system bring-up, board debug and platform verification
Lead a team or work independently on complex board designs and solving issues
Collaborate with a multi-sited R&D team to integrate your deliverables toward a successful release of new products into production
Conduct feasibility, design margin and validation analysis, and empirical testing on new and modified designs
Contribute to new innovation to solve emerging technology requirements for Enterprise networking products

What we offer

Health & Wellbeing
Personal & Professional Development
Unconditional Inclusion

Fulltime

Analog IC Design Architect

Our Hardware Engineers at Synopsys are responsible for designing and developing ...

Location

United States , Boxborough

Salary:

136000.00 - 204000.00 USD / Year

Synopsis Engineering

Expiration Date

Until further notice

Requirements

>15 years experience in PHY analog design, including pre-silicon and post-silicon validation
Strong knowledge of physical IP such as SERDES, DDR/HBM or Die to Die IO Interface
Expertise in design trade-offs, flows, and methodologies
Skilled in generating and supporting documentation through written specifications, and communicating those specifications within a design team and to external customers
Able to work across a multi-site team to communicate ideas, understand problems, and find solutions to create a leading-edge design
Skilled in troubleshooting and debug of mixed-signal interfaces
Proficiency in using industry-standard design tools and software
Excellent problem-solving skills and the ability to make strategic decisions
Experience in leading and driving technical solutions across organization, across function, across geography
The position requires good written & verbal communication skills as well a strong commitment and ability to work in cross functional and globally dispersed teams

Job Responsibility

Driving the development of world class high-performance D2D IPs to enable customer chiplet bases system design win across industries
Designing, developing, and evaluating PHY analog components for pre-silicon and post-silicon validation
Driving next gen Die to Die IP architecture definition and path finding
Customizing PHY designs to meet specific client requirements and performance criteria
Performing design trade-offs to optimize power, performance, and area (PPA)
Developing and implementing design flows and methodologies to streamline the design process
Collaborating with cross-functional teams to ensure seamless integration of analog components with digital systems
Providing technical guidance and mentorship to junior engineers and team members

What we offer

Comprehensive medical and healthcare plans that work for you and your family
In addition to company holidays, we have ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Save for your future with our retirement plans that vary by region and country
Competitive salaries

Fulltime

Networking Operating System Firmware Engineer

We’re seeking a Networking Operating System Firmware Engineer to help bootstrap ...

Location

United States , San Francisco

Salary:

266000.00 - 445000.00 USD / Year

OpenAI

Expiration Date

Until further notice

Requirements

Proven experience working with SONiC or comparable NOS stacks (FBOSS, Cumulus Linux, Arista EOS, Junos PFE-level integration, etc.)
Experience with updating OpenConfig gNMI interfaces and YANG data models
Strong background in Linux kernel, network device drivers, and low-level OS internals
Experience integrating Broadcom / Marvell / NVIDIA / Intel ASIC SDKs and SAI implementations
Proficiency in C, C++ and Python
Deep understanding of L2/L3 forwarding, ECMP, RoCE, BGP, QoS, PFC, buffer tuning, and telemetry
Hands-on experience with hardware platform bring-up and board-level debugging
Familiarity with CI/CD pipelines, distributed config/state management, and large-scale automation
Strong cross-functional problem solving in high-performance, distributed environments
Ability to lead teams to deliver a project end to end

Job Responsibility

Design, develop, and maintain custom SONiC NOS images for large-scale bleeding-edge AI fabrics
Integrate and configure Linux kernel components, device drivers, switch ASIC SDKs, and SAI layers
Bring up new switch platforms (thermal/fan control, power monitoring, transceiver management, watchdogs, OSFP CMIS, LEDs, CPLDs, etc.)
Extend and customize SONiC services for routing, telemetry, control-plane state, and distributed automation
Work with hardware teams to validate ASIC configurations, link bring-up, SerDes tuning, buffer profiles, and performance baselines
Evaluate switch silicon SDK releases, track vendor deliverables, and define platform requirements with vendors and ASIC partners
Debug complex issues spanning kernel, platform drivers, SONiC dockers, routing agents, orchestration services, hardware signals, and network topology
Integrate switches into fleet-wide monitoring, remote diagnostics, telemetry pipelines, and automated lifecycle workflows
Develop robust CI/build pipelines for reproducible NOS builds and controlled rollout across the fleet
Support factory bring-up and qualification all the way through mass deployment

What we offer

Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts
Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)
401(k) retirement plan with employer match
Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)
Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees
13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)
Mental health and wellness support
Employer-paid basic life and disability coverage
Annual learning and development stipend to fuel your professional growth
Daily meals in our offices, and meal delivery credits as eligible

Fulltime

ASIC Design Architect

We are seeking a highly experienced ASIC Networking Architect to join our archit...

Location

United States

Salary:

148000.00 - 340500.00 USD / Year

Hewlett Packard Enterprise

Expiration Date

Until further notice

Requirements

Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science. Ph.D. is a plus
Minimum 10+ years in ASIC architecture, with a focus on networking, computing, or high-performance data processing
Strong Background in: Computer Architecture: Multicore processing, memory hierarchy optimizations, hardware-software co-design
Networking Protocols: Ethernet, TCP/IP, BGP, MPLS, VXLAN, QoS, congestion control mechanisms
ASIC Development Lifecycle: RTL design (Verilog/SystemVerilog), verification methodologies (UVM), synthesis, P&R constraints, and tape-out experience
High-Speed Interfaces: PCIe Gen6, SerDes, CXL, HBM integration
Security & Virtualization: Hardware acceleration for secure packet processing, hypervisor optimizations, and virtual network functions
Leadership & Collaboration Skills: Experience working with cross-functional teams spanning hardware, software, and systems
Strong problem-solving and analytical abilities with a track record of delivering complex ASIC projects

Job Responsibility

Architecture Definition: Develop the micro-architecture and high-level design of networking ASICs, ensuring alignment with product goals, performance targets, and industry standards
Networking Protocols & Technologies: Design ASICs that support Ethernet (200G/400G/800G+), Programmability, and AI-driven networking enhancements
Computer Architecture & Memory Subsystems: Optimize packet processing pipelines, caching strategies, memory architectures (HBM, DDR, TCAM, SRAM), and interconnect fabrics for high-bandwidth, low-latency performance
ASIC Design Collaboration: Work with logic design, verification, and physical design teams to ensure smooth RTL implementation, synthesis, timing closure, and signoff
Performance Analysis & Optimization: Use simulation and emulation tools to model ASIC performance, validate system throughput, and optimize power/performance trade-offs
Security & Reliability Features: Implement security mechanisms such as MACSec, IPsec, and deep packet inspection for trusted networking solutions
Industry Trends & Future Technologies: Stay ahead of advancements in disaggregated networking, hardware acceleration (DPUs, SmartNICs), AI-driven networking, and software-defined infrastructure to influence long-term ASIC roadmaps
Technical Leadership: Drive architectural innovation and mentor engineers in design methodologies, ASIC lifecycle best practices, and system integration challenges
Influence Business decisions: Leverages recognized domain expertise, business acumen, and experience to influence decisions of executive business leadership, outsourced development partners, and industry standards groups

What we offer

Health & Wellbeing: We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing
Personal & Professional Development: We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division
Unconditional Inclusion: We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good

Fulltime

Senior R&D Hardware Test Engineer

As a member of the Client Biosciences San Jose Hardware Engineering Research & D...

Location

United States , San Jose

Salary:

55.00 - 58.00 USD / Hour

MillenniumSoft Inc

Expiration Date

Until further notice

Requirements

Bachelor’s degree in Electrical Engineering or similar technical discipline
Minimum 5 years of experience as a Test Engineer supporting product introduction
Strong experience in instrumentation measurements both analog and digital
Knowledgeable in PCB test standards, FPGA testing and high speed board test design
Methodologies of calibration and understanding of measurements uncertainty, six sigma and ICT/DFT/FCT
Extensive experience in testing of Digital and Analog/Mixed signal circuits
Experience using RF measurement instruments, high-speed oscilloscopes, signal generators, arbitrary waveform generators
Ability to read and interpret PCB schematics and perform basic digital and analog circuit analysis
Experience designing and analyzing test procedures to minimize measurement error
Knowledge of industrial controls systems and their communications interfaces and protocols such as Ethernet/IP

Job Responsibility

Interface with the R&D designers and other Hardware Engineers to define the most efficient and accurate measurement for testing the boards functionality
Design the test fixtures
Ability to remotely manage computers using SSH or VNC protocol using Git version control
Work closely with validation test engineers to insure that the test fixtures would satisfy module automated testing
Drive system verification of solutions through ATE/FCT
Support the HW team with sub system bring-up and test fixtures
Responsibility for Test definition and calibration of the ATE
Collaborate with HW Design Engineers to develop and execute hardware verification test plans
Board level functional testing
Design, build and program test systems used in HW testing as well as generate automated reports tracking for test results

Fulltime

Advanced Software Engineer- Camera/Driver Monitoring System

You'll have the opportunity to work on cutting-edge applications, develop breakt...

Location

India , Bangalore

Salary:

Not provided

Aptiv plc

Expiration Date

Until further notice

Requirements

Strong understanding of camera architecture, sensor technologies, and image signal processing (ISP) pipelines
Hands-on experience with SerDes configurations for high-speed data transmission in automotive or embedded systems
Proficiency in configuring camera sensors, including tuning parameters for optimal performance
Understanding of ISP stages such as demosaicing, noise reduction, color correction, and image enhancement
Build and optimize vision graphs, kernels, and nodes using TIOVX
integrate algorithms and ensure deterministic, real-time performance
Configure MIPI CSI-2 or FPD-Link/GMSL sensors
manage I²C registers, PLLs, exposure/white balance, sync signals
bring up serializer/deserializer chains with error diagnostics
Profile and optimize latency, throughput, and power

What we offer

Higher Education Opportunities (UDACITY, UDEMY, COURSERA are available for your continuous growth and development)
Life and accident insurance
Sodexo cards for food and beverages
Well Being Program that includes regular workshops and networking events
EAP Employee Assistance
Access to fitness clubs (T&C apply)
Creche facility for working parents

Fulltime

Serdes Systems Validation Engineer

BLUESTREAM PEOPLE

Location:
United Kingdom , Hampshire

Category:
IT - Software Development

Contract Type:
Not provided

Salary:

Job Description:

Job Responsibility:

Requirements:

Additional Information:

Job Posted:
December 06, 2025

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