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Are you ready to push the boundaries of what's possible in technology? Join the trailblazers at SanDisk, as an ASIC RTL Design Engineer, you will be at the forefront of designing high-performance ASICs. By leveraging your expertise in RTL design and modern tools like GitHub Copilot, you will enhance the design process and productivity. You will collaborate with cross-functional teams to deliver groundbreaking solutions that meet our high standards of quality and performance.
Job Responsibility:
Innovate, implement, and verify RTL code for complex ASICs
Own a subsystem / multiple subsystems and grow on the path to be an ASIC lead
Utilize advanced AI-driven tools, including GitHub Copilot, to streamline the design process
Collaborate with hardware and software teams for seamless integration
Lead design reviews and provide mentorship to junior engineers
Stay abreast of the latest industry trends and emerging technologies in AI and ASIC design
Requirements:
Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field
Proven experience in ASIC RTL design, with a strong grasp of Verilog/System Verilog
Proficiency in leveraging AI tools, including GitHub Copilot, for design and development
Strong problem-solving skills and the ability to thrive in a dynamic environment
Excellent communication and teamwork abilities
Nice to have:
Experience in low-power design techniques and methodologies