Senior Staff Silicon Design Engineer (Design Verification)

• Own part of IP feature design with cooperation with other designers
• As one of IP design team members, own for IP level design work, including architecture define (partly own or join), spec documentation, RTL coding, RTL delivery and signoff
• The target IP is used for all AMD mainstream products, product generation upgrade, reusability and scalibility need to be considered in architecture define and RTL maintain, as well as compliant to system application and sw/fw/hw cooperation.
• Need to co-work with other teams closely, include communication with AMD global soc architect and IP architect, closely work with verification team, trace and support backend work, silicon validation support.

• Strong experience in ASIC/SoC design
• Strong hands-on verilog development experience, familiar with scripting languages like Perl
• Good experience on complicate hub,control IP design
• Strong problem solving, independent thinking, teamwork and communication skills
• Bachelor or Master degree in E&E or Computer Engineering. (Preferred Master Degree)

• Knowledge on AXI, PCIE is a big plus.
• Better to have knowledge on x86 system view, embedded hw design with hw/sw/fw co-operation experience.

AMD benefits at a glance.