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As a SMTS within AMD’s Test Hardware Infrastructure Engineering team, you will drive the strategic planning, execution, and delivery of test hardware solutions that support Wafer Sort, Final Test, and System Level Test for AMD’s cutting-edge microprocessor and graphics products. You will lead cross-functional initiatives, manage vendor relationships, and ensure alignment across engineering, manufacturing, and supplier teams to meet performance, cost, and quality goals.
Job Responsibility:
Program Ownership: Lead end-to-end program management for ATE hardware solutions, from concept through production deployment, ensuring timely delivery and quality outcomes
Cross-Functional Leadership: Coordinate with internal engineering teams, external vendors, and manufacturing partners to align on requirements, schedules, and deliverables
Vendor & Supplier Management: Oversee the development and deployment of wafer probe and package test hardware infrastructure with external partners
New Product Enablement: Support first silicon bring-up and production ramp-up through effective planning and execution
Technical Planning: Develop and manage hardware test plans, risk assessments, and mitigation strategies
Technical support: Troubleshoot and debug hardware issues during ATE or SLT testing. Perform root cause analysis on test failures related to hardware, signal integrity, power issues, or DUT interface problems
Innovation & Benchmarking: Evaluate and implement Participate in new ATE, handler, and prober technologies to enhance test capabilities
Stakeholder Communication: Deliver clear and concise updates to technical and executive audiences, including documentation and presentations
Requirements:
Technical program management or Test/Product engineering experiences
Experience managing large-scale leading multi-team equipment development projects
Experience in ATE and/or SLT hardware development and debug
Strong leadership in cross-functional technical teams
Understanding of PCB layout, signal/power integrity, and fabrication processes
Understanding of high-speed interfaces such as PCIe, DDR, Ethernet, USB, and SerDes
Knowledge of Probers, Testers and Test Handlers
Knowledge of Socket and Thermal Solutions
Proficient in Allegro Cadence, Linux/Unix, and Microsoft Office
Experience working with global teams and external suppliers
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field
Nice to have:
Understanding of boot, BIOS, OS-level testing, and system stress testing will be an added advantage
Experience with Advantest 93K testers will be an added advantage
Experience in AI accelerator / GPU testing will be an added advantage