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Senior Staff Process Engineer - Yield Analysis

Singapore, Singapore · Job Posted March 21, 2026
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Job Description

As a key member of our Yield improvement team, the successful candidate will be primarily responsible for product yield enhancement and debug. You will be working closely with foundry partners and internal cross functional team for new product introduction, yield and quality improvement. You will also be working with product debug team to co-develop FPGA debug tools that allow product and yield engineers to do failure analysis on 1st silicon, burn-in, or reject units on both wafer and package level. You will be responsible for creating and verifying debug and analysis tools; verifying memory bit mapping; creating scripting to post process production test log; generating debug test patterns and perform silicon level debug for yield and quality improvement. Utilize knowledge of or wide-ranging experience with computers and electronics, including circuit boards, processors, chips, electronic equipment, design techniques, tools, and principles to resolve complex issues in creative and effective ways

Job Responsibility

  • FPGA Diagnostic Tool and Yield Analysis Tool Development – Continuously expands development of diagnostic and AI yield analysis tools and method capabilities for electrical fault isolation and yield improvement opportunity
  • Support diagnostic fault isolation of key failure mode of production test for yield and quality improvement
  • Foundry Management – Interacts closely and effectively communicates with supplier partners, drives yield engineering activities and quality initiatives to ensure AMD products meet best-in-class quality requirements

Requirements

  • 8+ years of experience in process engineering and semiconductor yield analysis
  • Extensive knowledge of FPGA architecture and diagnostics
  • Experience in fault isolation and physical failure analysis
  • Experience and knowledge of IC test pattern generation and debug
  • Integrated Circuit (IC) chips design software such as Cadence Schematics, LVS (Layout Versus Schematic), layout, and verification tools
  • Strong understanding of semiconductor manufacturing flow, from circuit design, manufacturing, and tests
  • Excellent problem-solving skills and ability to work independently and as part of a team
  • Scripting in TCL, Perl, or Python
  • Advanced data analysis and machine learning
  • SQL or QLAP databases
  • and Data analysis tools such as JMP, Pandas, NumPy, or Matplotlib
  • BS or MS in Computer Science/Engineering or equivalent

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