Senior SoC Performance Verification Engineer Job at Microsoft Corporation (Raleigh)

Senior Engineer - Verification

We are seeking skilled SoC (System-on-Chip) ARM Power architecture, Soc clock an...

Location

India , Noida

Salary:

Not provided

ARM

Expiration Date

Until further notice

Requirements

3 - 6 years of proven experience in working on SoC verification environments across Power verification involving multiple power islands and clock and reset verification
Knowledge of assembly language (preferably ARM), C/C++ and hardware verification languages (e.g. SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.)
Experience in one or more of various verification methodologies – UVM/OVM, formal, low power
Good knowledge and working verification experience in Arm M class CPU Processors
Good experience in handling Power aware verification with complex power architecture
Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation and support
Understanding of the fundamentals of Arm system architectures
Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools, UPF, and Debuggers
Experience in working and debugging Soc in DFT mode
Exposure to various front-end verification tools - Questa, VCS, Jasper Gold, Verdi

Job Responsibility

Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules
Responsible for leading a team of engineers to own and power, clk/rst verification for a complex IoT chip
Collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development and build a functional verification strategy
Senior engineers are also encouraged to support mentor junior team members

What we offer

Health and Wellness
Work and Life Success
Financial Rewards
Development and Support

Senior SoC Design Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Mountain View

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ years technical engineering experience
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements
Required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
Required to provide either proof of country of citizenship or proof of US residency or other protected status for assessment of eligibility to access export-controlled information
8+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System Verilog and Clock Domain Crossing (CDC)/Lint closure
6+ years of experience delivering successful IP or Application Specific Integrated Circuits (ASIC)/SOC designs
4+ years of experience in Synthesis, Timing constraints, Power, Performance, Area (PPA) trade-offs and Post-Silicon Debug

Job Responsibility

Part of the SOC design team driving many facets of high performance, high bandwidth designs
Working on Intellectual Property (IP) microarchitecture specification, Register Transfer Level (RTL) design, System on Chip (SOC) integration including clocking and resets, Synthesis and static checks such as Lint and Clock/Reset domain crossings
Interacting with various teams, including architecture, verification, and physical design, ensuring that the design is implemented and verified to the spec

Fulltime

Senior Quantum Design Verification Engineer

At Microsoft, our mission is to empower every person and every organization on t...

Location

United States , Redmond

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position
OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment
OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment
OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements
Microsoft Cloud Background Check
proof of citizenship or permanent residency

Job Responsibility

Define pre-silicon Simulation, post-silicon Validation/Characterization plans for SoC/ intellectual property (IP)
coordinate and drive individuals, contingent staff and external vendors towards creating a high-quality design
Own and create verification environments and tests for IP level and SoC level designs
validate designs in simulation with both pre and post layout RTL/netlists
Setup Databases, flows for SoC/IP repositories
Setup Bug-Tracking systems
Drive Milestone reviews, reports/status
Create testplans for pre-silicon simulation verification including for both digital and analog components
performing Analog Mixed Signal Simulation models
Collaborate with Design for Test (DFT) team to test DFT features

Fulltime

Senior Silicon Design Verification Engineer

Adaptive and Embedded Computing Group (AECG) seeks a Senior Silicon Design Verif...

Location

United States , San Jose

Salary:

136000.00 - 204000.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Proven track record in technical leadership of teams with 5+ engineers
Proven track record on driving strategies and successful verification execution of NoC, Crossbar switches, analyzed and verified system-level Performance and QoS requirements
Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium
Require strong understanding of state of the art of verification techniques, including assertion and coverage-driven verification
Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management
BS, MS or PhD in Electrical Engineering, Computer Engineering or Computer Science

Job Responsibility

Lead the verification of high-speed Crypto, Network-on-Chip (NoC), cutting-edge DRAM Memory controller (LPDDR6, DDR5) designs, ensuring the highest standards of quality and performance
Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level
Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs
Develop and execute comprehensive verification plans, including testbenches and test cases
Collaborate with design, architecture, and software teams to define and implement verification strategies
Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification
Mentor and guide junior engineers, fostering a collaborative and innovative team environment

Fulltime

Senior SoC HW (Functional) Validation Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...

Location

United States , Hillsboro

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role
Applied understanding of Computer Architecture and CPU/SoC validation principles, including: Understanding of SoC subsystem, SoC system level, and platform level functionality and writing scripts/software with industry standard languages like Python or C/C++
At least 5+ years of experience
Proficient communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams
Verification, logic development, validation, or validation tools experience as part of a CPU, SoC and/or IP development team
Leadership skills
Demonstrated validation expertise in one or more of the following: Functional: Core, cache Coherency/mesh/fabric, PCIe/ IO, Memory Controller, Power Management
Power and Performance
Automation, Content Creation, or Tools/Scripts Development

Job Responsibility

Own post-silicon validation of one of the following areas – functional validation of cache Coherency/mesh/fabric
Define, guide, and contribute to the implementation of silicon debug tools and capabilities
Become an expert on the overall architecture, implementation of complex features/flows/protocols, and their interactions with other parts of the SoC, with the platform, and with software
Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise
Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements
Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools and other validation collateral
Execute content in post-silicon, triage and debug failures
Apply your growth mindset to learn and adapt in a complex and dynamic environment
Engage with partners to drive continuous improvement to the design, to validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably
Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, verification engineers, other post-silicon validators, and IP and tool providers

Fulltime

Senior Pre-Silicon SoC Modeling Engineer

AWS's Trainium and Inferentia chips power the world's largest machine learning c...

Location

United States , Cupertino; Austin

Salary:

168100.00 - 261500.00 USD / Year

Amazon

Expiration Date

Until further notice

Requirements

6+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
Experience as a mentor, tech lead or leading an engineering team
6+ years writing functional or performance models of hardware (SoCs, ASICs, GPUs, CPUs, IP blocks)
Experience programming in C++, using advanced language features
Knowledge of SoC, CPU, GPU, and/or ASIC architecture and micro-architecture

Job Responsibility

Build and own models of SoC subsystems — translating architecture specs and RTL behavior into accurate, testable C++ models
Work directly with RTL design and verification teams to validate model behavior against RTL, debug discrepancies, and support pre-silicon verification flows
Develop model-based test infrastructure: regression suites, RTL correlation checks, and coverage-driven testing
Contribute to performance modeling efforts — building cycle-approximate models that help architects evaluate design trade-offs before RTL exists
Improve modeling methodology and infrastructure: how models are structured, integrated, tested, and released to DV and architecture teams
Collaborate with chip architects to understand upcoming designs and plan modeling work ahead of RTL availability

What we offer

health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
401(k) matching
paid time off
parental leave
sign-on payments
restricted stock units (RSUs)

Fulltime

Senior Quantum Analog Mixed-Signal Verification Engineer

At Microsoft Quantum, we aim to empower science and scientists to solve the worl...

Location

United States , Redmond

Salary:

119800.00 - 234700.00 USD / Year

Microsoft Corporation

Expiration Date

Until further notice

Requirements

Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position
OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment
OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment
OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Citizenship & Citizenship Verification: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations (ITAR) or Export Administration Regulations (EAR), the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status (e.g., under 8 U.S.C. § 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation).
Ability to work in an 'AI-first' environment using modern AI tools to accelerate discovery through hardware development.

Job Responsibility

Own and drive Analog Mixed-Signal (AMS) simulation of complex analog and digital blocks, including building analog block models, preparing and executing test plans, and supporting analog and AMS verification activities through tape-out
Integrate analog and digital blocks across multiple SoCs to create a system-wide simulation environment for system-level algorithm modeling
Coordinate with Analog Verification Engineers to run block-level and top-level analog and AMS simulations. Document results, present findings, drive design resolution, and provide status reports to track program metrics
Build behavioral models for part or all of the analog components to support AMS verification, and provide models for full-chip digital verification
Coordinate with internal team members and contractors, including screening and onboarding contractors as needed to complete deliverables
Establish standardized AMS verification and modeling methodology with peers
Other
Embody our culture and values

Fulltime

Senior Engineer, ASIC Development Engineering

As a SoC Validation/Verification Engineer, you will play a key role in ensuring ...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

BE or MS degree in Electrical Engineering or Computer Engineering
4-6 years of experience in SoC pre-/post-silicon verification and validation, and bring-up
Deep understanding of C, embedded programming, and hardware/software co-validation methodologies
Strong knowledge of SoC verification environments, SystemVerilog (SV), and UVM concepts
Proven history of developing and executing verification and validation strategies for complex SoCs
Experience in verification and validation of industry-standard protocols such as DDR, PCIe, LPDDR, USB, Ethernet, I²C, I3C, SPI, AXI, AHB, and APB
Run complex SoC verification and validation scenarios on Palladium/Emulation platforms
Must understand and contribute to complex SoC-level testbenches, including UVM, C, and SystemVerilog components
Execute verification and validation cases in simulation environments and perform initial debug and root cause analysis
Strong experience in bring-up, including board initialization, power-on sequences, processor boot, and system-level debug for both pre- and post-silicon phases

Job Responsibility

Understanding complex ASIC specifications to create comprehensive Verification/Validation plans for both pre- and post-silicon validation
Independently developing and executing tests for verification and validation
Collaborating with cross-functional teams to drive closure of verification and validation activities
Signing off on verification and validation deliverables
Debugging and root cause analysis of issues found during validation
Developing and maintaining automated test environments and regression suites
Contributing to the continuous improvement of verification methodologies and best practices
End-to-end ownership of one or more subsystems or SoC verification and validation flows, including planning, execution, and closure

Fulltime

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Senior SoC Performance Verification Engineer

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