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Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for a Senior SOC Fabric Verification Engineer to help achieve that mission. The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Compute Silicon and Manufacturing Organization (CSME) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for a Senior SOC Fabric Verification Engineer with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Senior SOC Fabric Verification Engineer as an individual contributor to join the team.
Job Responsibility:
Own verification of complex flows at the SOC or subsystems levels
Learn about the design and interact with partner teams to define verification strategies and test plans
Develop verification environments and run and debug simulations to drive quality
Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
Innovate to improve verification efficiency through methodologies or tools
Apply industry leading generative AI solutions to verification work
Coach and mentor others in your areas of expertise
Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
Requirements:
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience
Ability to meet Microsoft, customer and/or government security screening requirements
These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
Nice to have:
Demonstrated experience in one or more of the following: Coherent Hub Interface (CHI), Advanced eXtensible Interface (AXI) and Advanced Microcontroller Bus Architecture (AMBA) protocols
coherency, fabrics, integration of Central Processing Unit (CPU) cores, power management, reset, virtualization, interrupts, security, clocking, or other complex SOC flows and protocols
Experience with SOC or chip level verification for more than one product cycle from definition to silicon, including writing test plans, developing tests, debugging failures and signing off coverage
Experience creating, maintaining, or integrating test benches, checkers and stimulus using C, System Verilog Test Bench (SVTB), Universal Verification Methodology (UVM), and/or Formal Verification
Aptitude for writing scripts/software with industry standard languages like Python