CrawlJobs Logo
Microsoft Corporation Logo Microsoft Corporation · IT - Software Development

Senior SOC Debug Verification Engineer

India, Bangalore · Job Posted March 19, 2026
Apply Position
Job Link Share

Job Description

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, Verification & Validation team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Senior SOC Debug Verification Engineer to join the team.

Job Responsibility

  • Own verification of Design for Debug (DFD) SoC level flows including Task planning and schedule estimation, proactively identifying and removing roadblocks and finding ways to make the team more efficient
  • Develop verification strategy, requirements, environments, tools, and methodologies
  • Become an expert on the overall debug architecture, understand customer use models, and understand interactions with other parts of the SOC, with the platform, and with software
  • Apply your knowledge of verification principles and techniques and your judgement to write test plans and implement them by developing tests, test generators, test benches, checkers, coverage, and other verification collateral
  • Run tests, debug failures to root cause, and recommend fixes
  • Apply your growth mindset to learn and adapt in a complex and dynamic environment
  • Engage with partners to drive continuous improvement to both the design, to verification plans/collateral, and to methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably
  • Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise
  • Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, post-silicon validators, other verification engineers, and IP and tool providers
  • Delight your customers by providing high quality results on schedule
  • Provide technical leadership with respect and integrity
  • Apply your expertise towards supporting the post-silicon validation plans, tests, and debug of your area
  • Apply industry leading generative AI solutions to verification work

Requirements

  • 8+ years of pre-silicon SOC or subsystem or IP verification experience
  • Candidate must have at least a bachelor’s or master’s degree in electrical, Electronics, Computer Engineering, Computer Science or a related degree
  • 6+ years of verification experience working on CPU/SOC designs, with 2+ years of design for debug verification experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • This role will require access to information that is controlled for export under export control regulations
  • As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status
  • To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport

Nice to have

  • Experience with SOC DFD verification for a full product cycle from definition to silicon, including writing SOC level test plans, developing tests, debugging failures and coverage signoff
  • Demonstrated expertise in industry standard DFD architectural protocols such as JTAG interface, hardware triggers, breakpoints and tracing and hands-on experience in ARM Core Sight debug
  • Experience enabling and/or utilizing debug features in post-silicon
  • Proficient communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams
  • Experience planning verification tasks, estimating and assigning tasks, coordinating with customers and suppliers, and executing the plan
  • Proficient leadership skills
  • Passion for improving verification efficiency
  • Experience with Agile software practices
Microsoft Corporation - All Job Offers

Looking for more opportunities?

Search for other job offers that match your skills and interests.

Suggested Tags: Frontend Developer Secretary Talent Manager Salesforce Administrator Data Analyst
Similar Jobs for

Senior SOC Debug Verification Engineer

8 matching positions

Senior SoC Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Redmond
Salary
Salary:
119800.00 - 234700.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • This role will require access to information that is controlled for export under export control regulations
  • As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status
  • To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport
Job Responsibility
Job Responsibility
  • Establish yourself as an integral member of a pre-silicon verification and post-silicon validation team for the development of custom Intellectual Property (IP) components
  • Define pre-Si verification (simulation/emulation/FPGA-testing) and post-Si validation strategies
  • Execute end-to-end verification plans at sub-system or system level
  • C/C++ based test bench infrastructure and test development, debugging and driving final verification milestones
  • Support basic firmware development for industry standard CPUs
  • Silicon validation test planning, silicon bring-up and validation activities
  • Collaborate across verification teams on vertical and horizontal reuse of components
  • Interact with Architecture, Design, Firmware/Software, Product Engineering, Program Management and third party vendor teams to ensure pre-and-post-Si testing is comprehensive
  • Provide technical leadership through mentorship and teamwork
  • Adopt new AI based tools and agents for efficient execution
  • Fulltime
Read More
Arrow Right

Senior SoC Performance Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Raleigh
Salary
Salary:
119800.00 - 234700.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
  • OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
  • OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
  • OR equivalent experience.
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • This role will require access to information that is controlled for export under export control regulations
  • BS/MS in Electrical Engineering, Computer Engineering, Computer Science or related degree.
  • Performance verification experience through at least one end-to-end tapeout.
  • 6+ years of experience working on Computer Architecture and SoC design and verification principles, including using industry standard HDLs like System Verilog/UVM.
  • Experience developing tests targeting emulation platforms, including C/C++ and accelerated VIP content.
Job Responsibility
Job Responsibility
  • Own a novel performance verification endeavor, driving methodology for the current and future Cobalt programs.
  • Work with performance, IP, and SoC architects to identify and correlate on key performance indicators.
  • Become knowledgeable on the overall SoC architecture, understanding performance-critical datapaths and configurations.
  • Develop verification strategy, test plans, requirements, environments, tools, and methodologies.
  • Create performance tests, debug correlation mismatches to root cause, and recommend fixes.
  • Engage with partners to drive continuous improvement to both the design, to verification plans/collateral, and to methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably.
  • Mentor and coach team members
  • Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, post-silicon validators, other verification engineers, and IP and tool providers.
  • Embody our culture and values.
  • Fulltime
Read More
Arrow Right

Senior SOC Fabric Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Hillsboro
Salary
Salary:
119800.00 - 234700.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
Job Responsibility
Job Responsibility
  • Own verification of complex flows at the SOC or subsystems levels
  • Learn about the design and interact with partner teams to define verification strategies and test plans
  • Develop verification environments and run and debug simulations to drive quality
  • Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
  • Innovate to improve verification efficiency through methodologies or tools
  • Apply industry leading generative AI solutions to verification work
  • Coach and mentor others in your areas of expertise
  • Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
  • Fulltime
Read More
Arrow Right

Senior Verification Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Raleigh
Salary
Salary:
119800.00 - 234700.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • This role will require access to information that is controlled for export under export control regulations
  • 3+ years of experience working on Computer Architecture and SoC design and verification principles, including using industry standard HDLs like System Verilog
  • 3+ years of experience developing and using verification environments in industry standard languages like SVTB UVM or formal verification
  • 3+ years of experience in design verification with a proven track record of delivering complex SOC, SS or IP testbenches
  • Experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems
  • Experience with verification for multiple product cycles from definition to Silicon, including writing test plans, developing tests, debugging failures and coverage signoff in Universal Verification Methodology (UVM) and C++
Job Responsibility
Job Responsibility
  • Interact with architects and design engineers to create testplans covering verification strategy, test requirements, and test environments for SS- or SOC-level verification
  • Write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness
  • Develop Universal Verification Methodology (UVM) components to interface between test code and verification simulation environments
  • Define and implement functional coverage and drive coverage closure
  • Run tests, debug failures to root cause, and recommend fixes
  • Apply your growth mindset to learn and adapt in a complex and dynamic environment
  • Collaborate across verification teams on vertical and horizontal reuse of components
  • Mentor and coach team members
  • Apply your One Microsoft mentality to collaborate with and influence architects, logic designers, post-silicon validators, other verification engineers, and IP and tool providers
  • Embody our culture and values
  • Fulltime
Read More
Arrow Right

Senior Engineer - Verification

We are seeking skilled SoC (System-on-Chip) ARM Power architecture, Soc clock an...
Location
Location
India , Noida
Salary
Salary:
Not provided
arm.com Logo
ARM
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • 3 - 6 years of proven experience in working on SoC verification environments across Power verification involving multiple power islands and clock and reset verification
  • Knowledge of assembly language (preferably ARM), C/C++ and hardware verification languages (e.g. SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.)
  • Experience in one or more of various verification methodologies – UVM/OVM, formal, low power
  • Good knowledge and working verification experience in Arm M class CPU Processors
  • Good experience in handling Power aware verification with complex power architecture
  • Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation and support
  • Understanding of the fundamentals of Arm system architectures
  • Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools, UPF, and Debuggers
  • Experience in working and debugging Soc in DFT mode
  • Exposure to various front-end verification tools - Questa, VCS, Jasper Gold, Verdi
Job Responsibility
Job Responsibility
  • Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules
  • Responsible for leading a team of engineers to own and power, clk/rst verification for a complex IoT chip
  • Collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development and build a functional verification strategy
  • Senior engineers are also encouraged to support mentor junior team members
What we offer
What we offer
  • Health and Wellness
  • Work and Life Success
  • Financial Rewards
  • Development and Support
Read More
Arrow Right
New

Platform Soc Debug Lead Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great prod...
Location
Location
United States , Austin
Salary
Salary:
200000.00 - 300000.00 USD / Year
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Strong understanding of Server platform components, x86 or other complex CPU architectures
  • Deeper domain expertise in areas such as IO interfaces - PCIe, CXL, RAS, Power management to drive comprehensive system level test-plan execution
  • Understanding of BMC firmware and features, including IPMI, Redfish, sensor monitoring, power control, and remote management is a plus
  • Prior experience with computer system design and/or validation, testing tools, and environments
  • Experience with handling and taking captures using Oscilloscopes, protocol analyzers, and JTAG based Debug Tools
  • Proficiency in C, Python, and shell scripting for low-level development and debug
  • Excellent organizational skills and the ability to prioritize multiple workstreams and meet tight deadlines
  • Strong networking and relationship-building skills, with the ability to drive effective decision-making across various functions and levels within the organization
  • Knowledge of pre-silicon environments (Verification, Emulation, Virtual Bring-Up) is a plus
  • BS or MS degree in Electrical Engineering or related major, with 12+ years of applicable experience
Job Responsibility
Job Responsibility
  • Lead platform and SoC debug for EPYC/AI server platforms, driving issue resolution, validation, and quality to meet program milestones
  • Lead debugging efforts for enabling AI/Server SoC platforms in domains such as high-speed data-center I/O (PCIe, CXL, etc.), RAS features to resolve issues efficiently that are seen from the program execution
  • Collaborate with partner organizations to provide root cause analysis for platform issues in a Data center environment
  • Improve debug capabilities and methodology over time by identifying common challenges or impediments to efficient debug and working with partner organizations like design, Firmware and software teams to drive innovation in silicon architecture, design, tools and methods
  • Manage and track technical issues, risks, and priorities effectively with the business unit and SW Debug tools teams
  • Manage customer and executive communications, including program status, risks and opportunities
  • Maintain strong communication skills, both verbal and written, to convey summary findings and recommendations to senior management
  • Fulltime
Read More
Arrow Right

Senior Design Verification Engineer – Security IP

WHAT YOU DO AT AMD CHANGES EVERYTHING. At AMD, our mission is to build great pro...
Location
Location
India , Bangalore
Salary
Salary:
Not provided
amd.com Logo
AMD
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • BSc with a minimum of equivalent 5 years relevant experience
  • or MSc with a minimum of equivalent 3 years
  • or PhD in a directly related research area and a minimum of 1 year
  • A minimum of equivalent 10 years relevant experience if as advanced level team members
  • Proven understanding of MP subsystem and/or common hardware datapath accelerator architectures as well as deep knowledge of applicable state-of-art verification methodology and best practices, if as advanced level team members
  • Proficient in System Verilog, object oriented programming, and scripting (using Ruby, Perl, Python and Makefile)
  • Proven skills in creating UVC and other UVM components. Experience with C-DPI and Formal Verification techniques are valuable assets
  • Excellent understanding of standard bus/interface protocols (i.e. AXI, AHB, AMBA)
  • Proven experience with ASIC verification tools: simulation, debugging, linting, power aware simulation, etc.
  • Relevant design domain specific knowledge and technical leadership capability required for advanced level candidates
Job Responsibility
Job Responsibility
  • Develop and maintain block level IP and MP subsystem verification architecture, testbenches, test methodology and infrastructure
  • Develop and debug test plans using SystemVerilog/UVM constrained-random test methodology, C-DPI directed test methodology, formal proof verification methodology, and using object-oriented programming (OOP) techniques to implement/maintain testbenches and tests
  • Triage regressions, debug simulations, analyze coverage, work/resolve technical issues with design, verification and other teams to achieve verification closure
  • Participate in MP subsystem specification, influence IP micro-architecture development (design for verification aspect), design and execute reusable test methodology across individual MP subsystems
  • Debug and solve integration issues with SoC Integration and SoC DV teams
  • Provide technical leadership in verification methodology development and critical problem resolution if as advanced level team members
  • Provide project execution leadership in term of technical assignment ownership, technical mentorship, task planning through divide and conquer, task progress reporting and forecasting if as advanced level team members
  • Fulltime
Read More
Arrow Right

Senior SoC Design Engineer

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...
Location
Location
United States , Mountain View
Salary
Salary:
119800.00 - 234700.00 USD / Year
https://www.microsoft.com/ Logo
Microsoft Corporation
Expiration Date
Until further notice
Flip Icon
Requirements
Requirements
  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ years technical engineering experience
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
  • equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • Required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
  • Required to provide either proof of country of citizenship or proof of US residency or other protected status for assessment of eligibility to access export-controlled information
  • 8+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System Verilog and Clock Domain Crossing (CDC)/Lint closure
  • 6+ years of experience delivering successful IP or Application Specific Integrated Circuits (ASIC)/SOC designs
  • 4+ years of experience in Synthesis, Timing constraints, Power, Performance, Area (PPA) trade-offs and Post-Silicon Debug
Job Responsibility
Job Responsibility
  • Part of the SOC design team driving many facets of high performance, high bandwidth designs
  • Working on Intellectual Property (IP) microarchitecture specification, Register Transfer Level (RTL) design, System on Chip (SOC) integration including clocking and resets, Synthesis and static checks such as Lint and Clock/Reset domain crossings
  • Interacting with various teams, including architecture, verification, and physical design, ensuring that the design is implemented and verified to the spec
  • Fulltime
Read More
Arrow Right