Senior Silicon Design Engineer

• Apply current functional verification techniques to perform and improve pre-silicon IP verification quality and product Time to Market for ASIC/SOC design
• Technically involve in the porting/creation of the DV environment for the new design
• block and IP level test plan creation and implementation
• coverage analysis
• regression cleanup
• Work independently on various DV tasks and providing technical guidance to the DV team
• lead a big DV task inside team or cross team

• Good understanding on ASIC/SOC design verification flow with SV/UVM/Formal Verification
• Good experiences with simulation model creation and testbench build (better with UVM)
• Good logical thinking and expression
• Good cooperation cross teams
• Bachelors or Masters degree in Computer Engineering/Electrical and Electronics Engineering
• X86/ARM/8051 architecture
• AMBA(AXI/AHB/APB) bus
• PCIe protocol
• f/w writing and debug experience
• experience to co-work with f/w team for f/w sequence define in embedded design
• good at some script language such as Perl, python
• some database experience
• experience focusing on SV assertion/coverage/formal verification
• good verbal and written communication skills in English
• imaginative thinking and sophisticated analytical techniques
• self-driven for quality and timely result
• capability to solve complex problems

• X86/ARM/8051 architecture
• AMBA(AXI/AHB/APB) bus
• PCIe protocol
• f/w writing and debug experience
• experience to co-work with f/w team for f/w sequence define in embedded design
• good at some script language such as Perl, python
• some database experience
• experience focusing on SV assertion/coverage/formal verification

AMD benefits at a glance