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Senior Silicon Design Engineer

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AMD

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Location:
Romania , IASI

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Contract Type:
Not provided

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Salary:

Not provided

Job Description:

This role will focus on planning, micro architect, documenting, code and debug the RTL for new and existing features for AMD’s Infinity Data Fabric with focus on complexity, timing, area and power consumption efficiency.

Job Responsibility:

  • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be designed
  • Micro architect the feature, document it, estimate the effort and review the implementation with RTL lead and verification team
  • Execute the RTL code of the new feature at best quality and within the estimated duration
  • Debug and fix the RTL bugs, fix timing, area and power consumption issues
  • Debug support for SOC simulation, emulation and actual silicon bring-up in lab
  • Analyze code coverage and detect holes in the verification environment

Requirements:

  • Experience with digital circuits and the ability to synthesize small circuitry
  • Experience with Verilog Hardware description Language is highly desirable
  • Good understanding of how a microprocessor/microcontroller works and how such devices can be interfaced with various peripherals like memories and io devices
  • Good understanding on cache coherency protocols is desirable
  • Proficient in debugging firmware and RTL code using simulation tools
  • Exposure to leadership or mentorship is an asset
  • Excellent communication skills & teamwork experience is highly desirable
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Nice to have:

  • Experience with scripting languages like TCL, Perl, Python is a plus
  • Exposure to basic Linux commands - awk, sed, vim & regular expression is a plus
  • Exposure to EDA tools, like the ones from Synopsys, Cadence, Mentor Graphics, Xilinx is a plus

Additional Information:

Job Posted:
May 04, 2026

Employment Type:
Fulltime
Work Type:
Remote work
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