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Microsoft Corporation Logo Microsoft Corporation · IT - Software Development

Senior RTL to Physical Design Engineer

United States, Redmond 119800.00 - 234700.00 USD / Year · Job Posted February 21, 2026
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Job Description

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for a Senior RTL to Physical Design Engineer to help achieve that mission.

Job Responsibility

  • Be a key link between front-end design and back-end teams
  • Lead in the enablement of quality RTL and collateral file drops to PD
  • Implement feedback and mitigations in the design constraints and toolchain to ensure best-case PPA
  • Coordinate with RTL, DFT, CAD and physical design teams
  • Participate in flow development, design automation, and correlation exercises to back-end flows
  • Work with limited direction and have attention to detail
  • Provide crisp status of progress, issues, and risks on the program to the management team

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
  • equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • Microsoft Cloud Background Check

Nice to have

  • Bachelor of Science in Electrical or Computer Engineering
  • 8+ years of experience in hardware design
  • 8+ years of experience in Synthesis, Timing constraints, Front-end design checks and Power Performance Area (PPA) trade-offs
  • Experience in collateral development including timing and synthesis constraints
  • Experience in front-end design checks including LEC, Lint, Formal Equivalence, and CDC/RDC
  • Experience in recent synthesis tool capabilities and methods for QoR improvement
  • Experience in static timing analysis
  • Experience in DFT insertion flows and timing constraints
  • Familiarity with RTL and gate-level power analysis/optimization, UPF, and power-intent verification
  • Experience with the project-level setup and configuration of 1 or more of the tools related to above disciplines
  • Experience in translating physical design results into feedback for flow or RTL improvement
  • Experience in Tcl, Perl, Python, shell programming
  • Knowledge of full RTL2GDS flow
  • Experience in ICC, power integrity analysis, ESD, PV
  • Good communication and self-motivated that can collaborate with larger teams within Microsoft
  • Occasional travel
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