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Senior Quantum Design Verification Engineer

United States, Redmond Employment contract 119800.00 - 234700.00 USD / Year · Job Posted May 14, 2026
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Job Description

At Microsoft, our mission is to empower every person and every organization on the planet to achieve more. We are advancing technological innovation through quantum computing... As a Senior Quantum Design Verification Engineer...

Job Responsibility

  • Define pre-silicon Simulation, post-silicon Validation/Characterization plans for SoC/ intellectual property (IP)
  • coordinate and drive individuals, contingent staff and external vendors towards creating a high-quality design
  • Own and create verification environments and tests for IP level and SoC level designs
  • validate designs in simulation with both pre and post layout RTL/netlists
  • Setup Databases, flows for SoC/IP repositories
  • Setup Bug-Tracking systems
  • Drive Milestone reviews, reports/status
  • Create testplans for pre-silicon simulation verification including for both digital and analog components
  • performing Analog Mixed Signal Simulation models
  • Collaborate with Design for Test (DFT) team to test DFT features
  • Align verification methodologies with wider teams and drive continuous improvement
  • Collaborate effectively with architects, analog mixed-signal designers, verification engineers, physical design and DFT teams

Requirements

  • Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position
  • OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment
  • OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment
  • OR equivalent experience
  • Ability to meet Microsoft, customer and/or government security screening requirements
  • Microsoft Cloud Background Check
  • proof of citizenship or permanent residency

Nice to have

  • Degree (BSEE/MSEE/PhD) in Electrical Engineering or related field
  • 6+ years of experience in design verification with a proven track record of full verification cycle on complex SoC IPs and/or systems
  • In depth knowledge of verification principles, testbenches, stimulus generation
  • Substantial background in creating simulation environments, developing tests, and debugging designs
  • Solid understanding of chip and/or computer architecture
  • Solid understanding of Analog/Digital interface verification, including modeling of Analog components as required
  • Scripting language such as Python, Ruby, or Perl
  • Experience writing tests in C and C++
  • Effective communication, collaboration and teamwork skills
  • Artificial Intelligence (AI)-assisted solutions into verification flows
  • Matlab Modeling
  • Familiarity with Analog Mixed-Signal modeling and simulations
  • Visual Studio Code
  • Silicon Characterization of Analog Mixed-Signal blocks
  • Automation of simulation and data analysis environments using scripting languages or tools such as MATLAB/Python
  • Ability to leverage AI tools to drive innovation and efficiency
  • Ability to work in an AI-first environment

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  • Own and drive Analog Mixed-Signal (AMS) simulation of complex analog and digital blocks, including building analog block models, preparing and executing test plans, and supporting analog and AMS verification activities through tape-out
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