Senior Manager Silicon Design Engineering Job at AMD (Penang)

Senior Manager Silicon Design Engineering

AMD seeks a passionate, collaborative leader with strong technical skills and th...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Bachelors or Masters degree in computer engineering/Electrical Engineering
Strong mentoring and coaching skills
Excellent people skills
Excellent verbal and written communication skills
Strong time management skills
Good understand of Analog Layout
Good understand of Analog Circuits
Able to review Analog Layout PDV results
Attention to detail
Good problem-solving skills

Job Responsibility

People Manager – responsible for Team Members
Career Development
Performance Management
Project Management
Able to manage multiple projects efficiently and effectively
Resource planning
Project scheduling
Project Tracking
Work closely with Engineering staff to ensure correct requirements are achieved
Project status report-out to various stakeholders

Senior Silicon Design Verification Engineer

Adaptive and Embedded Computing Group (AECG) seeks a Senior Silicon Design Verif...

Location

United States , San Jose

Salary:

136000.00 - 204000.00 USD / Year

AMD

Expiration Date

Until further notice

Requirements

Proven track record in technical leadership of teams with 5+ engineers
Proven track record on driving strategies and successful verification execution of NoC, Crossbar switches, analyzed and verified system-level Performance and QoS requirements
Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium
Require strong understanding of state of the art of verification techniques, including assertion and coverage-driven verification
Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management
BS, MS or PhD in Electrical Engineering, Computer Engineering or Computer Science

Job Responsibility

Lead the verification of high-speed Crypto, Network-on-Chip (NoC), cutting-edge DRAM Memory controller (LPDDR6, DDR5) designs, ensuring the highest standards of quality and performance
Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level
Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs
Develop and execute comprehensive verification plans, including testbenches and test cases
Collaborate with design, architecture, and software teams to define and implement verification strategies
Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification
Mentor and guide junior engineers, fostering a collaborative and innovative team environment

Fulltime

Senior Product Engineering Manager (NPI)

As a New Product Introduction Product Engineering Senior Manager, you will lead ...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Strong technical, analytical, leadership and problem-solving skills
independent and resourceful
experience in leading NPI teams
understanding ecosystem of product development
good communication
Analytical Thinker
Data Analytics
experience in applied Solid State Physics, Computer Architecture, Digital or Analog Design
Wafer and FT/SLT test methodology and equipment knowledge
experience in Product Management methodology, fab process and/or x86/GPU

Job Responsibility

Lead the Product Engineering team in silicon characterization and analysis to develop Product Definition to meet customer requirements and achieve Yield and Cost target
Take ownership of PEO inputs to design issues, work with design teams to provide requested feedback
Provide Product Technical leadership to PEO teams, drive alignment among teams to achieve product technical requirements
Influence Design and Customer technical discussions that have a significant impact on final product
Conduct product Test, Cost and Quality gate reviews as per development milestones
Provide timely debug for customer reported issues, assist customer and quality teams to provide resolutions

Fulltime

Senior Product Development Engineering Manager

As a Product Manager within the Product Engineering Organization (PEO) supportin...

Location

Malaysia , Penang

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering or related field
10+ years’ experience in semiconductor product development, product/test engineering, program management, or equivalent technical leadership roles
Proven experience leading complex NPI or product/program launches with cross-functional teams
Strong knowledge of semiconductor product lifecycle: bring‑up, characterization, yield optimization, test content development, SLT/FT/test flow readiness
Ability to understand and influence design, test, and manufacturing trade-offs
Familiarity with OSAT/ATMP processes, package qualification, HTOL/ESD/DFx, and reliability methodologies
Demonstrated ability to lead teams, coach talent, and foster a high-performance culture
Strong analytical thinking, problem-solving, and data-driven decision-making
Excellent communication skills for engaging executives, engineering teams, suppliers, and customers
Proactive, adaptable, and able to navigate dynamic technical and organizational landscapes

Job Responsibility

Serve as the overall program owner responsible for end‑to‑end planning, negotiating, and executing complex Enterprise product roadmaps, balancing business goals with technical feasibility
Influence product definition, silicon configuration, OPN planning, platform requirements, and supply/demand distribution
Lead multi-functional teams spanning Design, Product/Test Engineering, Quality/Reliability, Platform, Architecture, Supply Chain, ATMP/OSAT, and external partners to ensure cross‑discipline alignment and timely execution
Establish program schedules, critical path, risk assessments, and mitigating actions
drive closure on all blockers to ensure smooth NPI execution
Engage BU leadership and executive stakeholders, providing clear program updates, risk assessments, and decision recommendations
Provide technical leadership across Product Engineering (characterization, test strategy, yield optimization, debug, quality screens, SLT/FT readiness)
Guide test readiness at all stages: probe/sort, FT, SLT, quality screens (HTOL/ESD/Package Qual), and debug flows through bring-up to production
Leverage engineering data to influence design decisions, test coverage, DFT strategies, and yield improvement initiatives
Partner with ATMP JV sites and OSATs to support test program qualification, package qual readiness, and ramp-to-production milestones

Senior Manager Product Development Engineering - ATE Test Solutions

We are the high-end test engineering team providing test solutions for Data Cent...

Location

Singapore , Singapore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Strong technical, analytical, leadership and problem-solving skills
Independent and resourceful individual
Proficient understanding of DFT(Design-For-Test) architecture for SOC (System-On-Chip) product
Strong test development, Silicon characterization/debug working experience various industry standard ATE test platforms
Data analysis
Good understanding of power and performance characterization on ATE
ATE Test handling/ execution and development experience - Advantest V93K experience preferred (Advantest SMT8 experience is a plus)
Software programming and scripting proficiency (C++, Java, Groovy, Perl, Ruby, Python)
Proficiency in Windows and Linux operating systems
Experience with HVM (High Volume Manufacturing) is a strong plus

Job Responsibility

Accountable to drive test solution/coverage development, optimization to meet business milestone, cost and quality
ATE Test patterns & test flows/method development, debug, test and characterization
Pre-Silicon engagement with Design, test solution/methodology scoping, planning & validation
Post Silicon Bring up of test patterns leading to optimization for mass production enablement
Characterization execution/analysis and debug of new silicon designs and process technologies
Optimization of test coverage and flows for increased quality, yield, cost improvement, and test time reduction
Conduct engineering evaluations and analysis to drive closure of production issues
Solves complex, novel, and non-recurring problems
initiate significant changes to existing processes/methods and leads development and implementation
Influences technical decisions that have a significant impact on final product

Senior Manager - ASIC Development Engineering

We are seeking a highly skilled and experienced DFT Engineer to join our dynamic...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

B.Tech / M.Tech / Phd in Electronics, Computer science or Electrical Engineering
Minimum 14+ years of experience in DFT
Strong understanding of DFT Architecture
Extensive experience in SoC DFT architecture, DFT IP development and DFT methodology
Proven track record of driving DFT architecture in complex ASIC designs
Work independently on multiple complex DFT problems across different projects
Proficiency in ASIC DFT Implementation tools, simulation methodologies, and hardware description languages (HDLs)
Proficiency in SCAN, MBIST implementation
Solid understanding of JTAG & BSDL standards
Good understanding on Test clocking requirements, Test mode timing closure

Job Responsibility

DFT Architecture definitions for SoC development
Leading complex activities and providing solutions for complex DFT problems
Collaborate with cross-functional teams to define and refine SoC DFT requirements, ensuring alignment with industry standards and customer needs
Working closely with the Design, Verification, Physical Design & Test Engineering teams while guiding them on the test requirements and methodologies
Work closely with the Product Engineering team and understand the test requirements, get involved in complex silicon debugs
Evaluate all aspects of the SoC DFT flow from requirements, through detailed definitions, and work closely with the CAD to continuously improve the DFT methodology

Fulltime

Senior Manager - ASIC Development Engineering

We are seeking a highly skilled and experienced DFT Engineer to join our dynamic...

Location

India , Bengaluru

Salary:

Not provided

Sandisk

Expiration Date

Until further notice

Requirements

B.Tech / M.Tech / Phd in Electronics, Computer science or Electrical Engineering
Minimum 14+ years of experience in DFT
Strong understanding of DFT Architecture
Extensive experience in SoC DFT architecture, DFT IP development and DFT methodology
Proven track record of driving DFT architecture in complex ASIC designs
Work independently on multiple complex DFT problems across different projects
Proficiency in ASIC DFT Implementation tools, simulation methodologies, and hardware description languages (HDLs)
Proficiency in SCAN, MBIST implementation
Solid understanding of JTAG & BSDL standards
Good understanding on Test clocking requirements, Test mode timing closure

Job Responsibility

DFT Architecture definitions for SoC development
Leading complex activities and providing solutions for complex DFT problems
Collaborate with cross-functional teams to define and refine SoC DFT requirements, ensuring alignment with industry standards and customer needs
Working closely with the Design, Verification, Physical Design & Test Engineering teams while guiding them on the test requirements and methodologies
Work closely with the Product Engineering team and understand the test requirements, get involved in complex silicon debugs
Evaluate all aspects of the SoC DFT flow from requirements, through detailed definitions, and work closely with the CAD to continuously improve the DFT methodology

Fulltime

PMTS Silicon Design Engineer

We are seeking a seasoned SoC Architect with expertise or significant interest i...

Location

India , Bangalore

Salary:

Not provided

AMD

Expiration Date

Until further notice

Requirements

Outstanding foundation in Systems & SoC architecture, with expertise in one or more of the following: CPU or GPU, Memory sub-system, Fabrics, CPU/GPU coherency, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security
Experience analyzing CPU, GPU or System-level Micro-Architectural features to identify performance bottlenecks within different workloads
Demonstrated expertise in power management microarchitecture, low power design and power optimization, along with power impact at architecture, logic design, and circuit levels
Excellent communication, management, and presentation skills
Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies
Bachelor's or Master's degree in related discipline preferred

Job Responsibility

Define product features and capabilities, close architecture, and micro-architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams
Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS & SW and ensure that FW, BIOS & SW are aligned to enable all features, optimizing for performance and power
Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements
Knowledge sharing and other contributions to Platform & System Architecture
As an overall product owner, responsible for architecture analysis and technical solutions for marketing/feature change requests
Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs
Support Post-Si teams for Product Performance, Power and functional issues debug/resolution

Fulltime

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Senior Manager Silicon Design Engineering

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