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Senior Hardware Engineer - Signal Delivery

United States, North Reading 175300.00 - 280600.00 USD / Year · Job Posted April 11, 2026
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Job Description

The Innovation Lab is an advanced R&D team that is part of the Semiconductor Test Division at Teradyne. We are seeking a Senior Hardware Engineer - Signal Delivery to join the Teradyne Innovation Lab – the team responsible for developing breakthrough concepts for use in Semiconductor Test Systems of the future. This role is critical in ensuring high-performance signal integrity across advanced semiconductor interfaces, including UCIe-based architectures and microbump interconnects. You will be instrumental in shaping the future of chiplet-based systems, fine pitch probing, and high-speed interconnects.

Job Responsibility

  • Lead the design and analysis of high-speed signal delivery systems supporting high speed industry data interfaces such as PCIe, UCIe, etc.
  • Develop simulation models and perform signal integrity analysis to ensure robust performance across various operating conditions
  • Collaborate with cross-functional teams including packaging, PCB layout, and silicon design to optimize signal paths and microbump connections
  • Build and validate prototypes to test signal delivery performance and compliance of system probe card interfaces including microbump and fine pitch probing specifications
  • Support product development from concept through production, ensuring signal integrity and reliability
  • Ensure compliance with industry standards and internal quality metrics
  • Drive PCB design efforts involving very large panels, high layer count sequential builds, and fine pitch sequential lamination
  • Lead development of ultra-fine pitch MLO (Multi-Layer Organic) substrates with embedded active and passive components
  • Coordinate and manage cross-site, global engineering teams to ensure alignment and execution across time zones
  • Provide clear, data-driven risk assessments and mitigation strategies to management and stakeholders

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering or related field
  • Minimum 7 years of experience in signal integrity or high-speed hardware design
  • Proven experience with signal delivery in advanced semiconductor systems
  • Strong working knowledge interconnect standards
  • Experience working with microbump technology and its impact on signal integrity
  • Familiarity with fine pitch probing techniques and associated challenges
  • Proficiency in simulation tools such as Ansys HFSS, SIwave, ADS, or equivalent
  • Experience with PCB layout tools and design for signal integrity
  • Familiarity with lab equipment for signal validation (oscilloscopes, TDR, VNA)
  • Strong analytical and problem-solving skills
  • Excellent communication and mentorship abilities
  • Demonstrated ability to lead and collaborate with global engineering teams
  • Skilled in presenting technical risk assessments and trade-offs to leadership

Nice to have

  • Preference for candidates with experience in chiplet-based and UCIe system design
  • Preference for candidates with experience in MEMS needle array technology
  • Preference for candidates with experience in cross-functional hardware development

What we offer

  • Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more
  • This job is eligible for discretionary bonus(es) based on financial performance

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